338 lines
13 KiB
C
338 lines
13 KiB
C
/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2015 David Ogilvy (MetalPhreak)
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* Modified 2016 by Radomir Dopieralski
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#include "hspi.h"
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/*
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Wrapper to setup HSPI/SPI GPIO pins and default SPI clock
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spi_no - SPI (0) or HSPI (1)
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Not used in MicroPython.
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*/
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void spi_init(uint8_t spi_no) {
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spi_init_gpio(spi_no, SPI_CLK_USE_DIV);
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spi_clock(spi_no, SPI_CLK_PREDIV, SPI_CLK_CNTDIV);
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spi_tx_byte_order(spi_no, SPI_BYTE_ORDER_HIGH_TO_LOW);
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spi_rx_byte_order(spi_no, SPI_BYTE_ORDER_HIGH_TO_LOW);
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SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_CS_SETUP | SPI_CS_HOLD);
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CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_FLASH_MODE);
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}
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/*
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Configures SPI mode parameters for clock edge and clock polarity.
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spi_no - SPI (0) or HSPI (1)
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spi_cpha - (0) Data is valid on clock leading edge
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(1) Data is valid on clock trailing edge
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spi_cpol - (0) Clock is low when inactive
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(1) Clock is high when inactive
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For MicroPython this version is different from original.
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*/
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void spi_mode(uint8_t spi_no, uint8_t spi_cpha, uint8_t spi_cpol) {
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if (spi_cpol) {
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SET_PERI_REG_MASK(SPI_PIN(HSPI), SPI_IDLE_EDGE);
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} else {
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CLEAR_PERI_REG_MASK(SPI_PIN(HSPI), SPI_IDLE_EDGE);
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}
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if (spi_cpha == spi_cpol) {
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// Mode 3 - MOSI is set on falling edge of clock
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// Mode 0 - MOSI is set on falling edge of clock
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CLEAR_PERI_REG_MASK(SPI_USER(HSPI), SPI_CK_OUT_EDGE);
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SET_PERI_REG_MASK(SPI_USER(HSPI), SPI_CK_I_EDGE);
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} else {
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// Mode 2 - MOSI is set on rising edge of clock
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// Mode 1 - MOSI is set on rising edge of clock
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SET_PERI_REG_MASK(SPI_USER(HSPI), SPI_CK_OUT_EDGE);
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CLEAR_PERI_REG_MASK(SPI_USER(HSPI), SPI_CK_I_EDGE);
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}
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}
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/*
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Initialise the GPIO pins for use as SPI pins.
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spi_no - SPI (0) or HSPI (1)
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sysclk_as_spiclk -
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SPI_CLK_80MHZ_NODIV (1) if using 80MHz for SPI clock.
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SPI_CLK_USE_DIV (0) if using divider for lower speed.
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*/
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void spi_init_gpio(uint8_t spi_no, uint8_t sysclk_as_spiclk) {
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uint32_t clock_div_flag = 0;
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if (sysclk_as_spiclk) {
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clock_div_flag = 0x0001;
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}
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if (spi_no == SPI) {
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// Set bit 8 if 80MHz sysclock required
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WRITE_PERI_REG(PERIPHS_IO_MUX, 0x005 | (clock_div_flag << 8));
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CLK_U, 1);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_CMD_U, 1);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA0_U, 1);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_SD_DATA1_U, 1);
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} else if (spi_no == HSPI) {
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// Set bit 9 if 80MHz sysclock required
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WRITE_PERI_REG(PERIPHS_IO_MUX, 0x105 | (clock_div_flag << 9));
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// GPIO12 is HSPI MISO pin (Master Data In)
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, 2);
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// GPIO13 is HSPI MOSI pin (Master Data Out)
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, 2);
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// GPIO14 is HSPI CLK pin (Clock)
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, 2);
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// GPIO15 is HSPI CS pin (Chip Select / Slave Select)
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// In MicroPython, we are handling CS ourself in drivers.
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// PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, 2);
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}
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}
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/*
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Set up the control registers for the SPI clock
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spi_no - SPI (0) or HSPI (1)
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prediv - predivider value (actual division value)
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cntdiv - postdivider value (actual division value)
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Set either divider to 0 to disable all division (80MHz sysclock)
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*/
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void spi_clock(uint8_t spi_no, uint16_t prediv, uint8_t cntdiv) {
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if (prediv == 0 || cntdiv == 0) {
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WRITE_PERI_REG(SPI_CLOCK(spi_no), SPI_CLK_EQU_SYSCLK);
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} else {
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WRITE_PERI_REG(SPI_CLOCK(spi_no),
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(((prediv - 1) & SPI_CLKDIV_PRE) << SPI_CLKDIV_PRE_S) |
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(((cntdiv - 1) & SPI_CLKCNT_N) << SPI_CLKCNT_N_S) |
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(((cntdiv >> 1) & SPI_CLKCNT_H) << SPI_CLKCNT_H_S) |
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((0 & SPI_CLKCNT_L) << SPI_CLKCNT_L_S)
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);
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}
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}
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/*
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Setup the byte order for shifting data out of buffer
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spi_no - SPI (0) or HSPI (1)
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byte_order -
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SPI_BYTE_ORDER_HIGH_TO_LOW (1)
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Data is sent out starting with Bit31 and down to Bit0
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SPI_BYTE_ORDER_LOW_TO_HIGH (0)
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Data is sent out starting with the lowest BYTE, from MSB to LSB,
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followed by the second lowest BYTE, from MSB to LSB, followed by
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the second highest BYTE, from MSB to LSB, followed by the highest
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BYTE, from MSB to LSB 0xABCDEFGH would be sent as 0xGHEFCDAB.
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*/
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void spi_tx_byte_order(uint8_t spi_no, uint8_t byte_order) {
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if (byte_order) {
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SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_WR_BYTE_ORDER);
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} else {
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CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_WR_BYTE_ORDER);
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}
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}
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/*
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Setup the byte order for shifting data into buffer
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spi_no - SPI (0) or HSPI (1)
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byte_order -
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SPI_BYTE_ORDER_HIGH_TO_LOW (1)
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Data is read in starting with Bit31 and down to Bit0
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SPI_BYTE_ORDER_LOW_TO_HIGH (0)
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Data is read in starting with the lowest BYTE, from MSB to LSB,
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followed by the second lowest BYTE, from MSB to LSB, followed by
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the second highest BYTE, from MSB to LSB, followed by the highest
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BYTE, from MSB to LSB 0xABCDEFGH would be read as 0xGHEFCDAB
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*/
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void spi_rx_byte_order(uint8_t spi_no, uint8_t byte_order) {
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if (byte_order) {
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SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_RD_BYTE_ORDER);
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} else {
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CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_RD_BYTE_ORDER);
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}
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}
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/*
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SPI transaction function
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spi_no - SPI (0) or HSPI (1)
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cmd_bits - actual number of bits to transmit
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cmd_data - command data
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addr_bits - actual number of bits to transmit
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addr_data - address data
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dout_bits - actual number of bits to transmit
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dout_data - output data
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din_bits - actual number of bits to receive
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Returns: read data - uint32_t containing read in data only if RX was set
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0 - something went wrong (or actual read data was 0)
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1 - data sent ok (or actual read data is 1)
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Note: all data is assumed to be stored in the lower bits of the data variables
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(for anything <32 bits).
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*/
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uint32_t spi_transaction(uint8_t spi_no, uint8_t cmd_bits, uint16_t cmd_data,
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uint32_t addr_bits, uint32_t addr_data,
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uint32_t dout_bits, uint32_t dout_data,
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uint32_t din_bits, uint32_t dummy_bits) {
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while (spi_busy(spi_no)) {
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}
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; // Wait for SPI to be ready
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// Enable SPI Functions
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// Disable MOSI, MISO, ADDR, COMMAND, DUMMY in case previously set.
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CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI | SPI_USR_MISO |
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SPI_USR_COMMAND | SPI_USR_ADDR | SPI_USR_DUMMY);
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// Enable functions based on number of bits. 0 bits = disabled.
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// This is rather inefficient but allows for a very generic function.
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// CMD ADDR and MOSI are set below to save on an extra if statement.
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if (din_bits) {
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if (dout_bits) {
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SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_DOUTDIN);
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} else {
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SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MISO);
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}
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}
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if (dummy_bits) {
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SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_DUMMY);
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}
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// Setup Bitlengths
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WRITE_PERI_REG(SPI_USER1(spi_no),
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// Number of bits in Address
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((addr_bits - 1) & SPI_USR_ADDR_BITLEN) << SPI_USR_ADDR_BITLEN_S |
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// Number of bits to Send
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((dout_bits - 1) & SPI_USR_MOSI_BITLEN) << SPI_USR_MOSI_BITLEN_S |
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// Number of bits to receive
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((din_bits - 1) & SPI_USR_MISO_BITLEN) << SPI_USR_MISO_BITLEN_S |
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// Number of Dummy bits to insert
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((dummy_bits - 1) & SPI_USR_DUMMY_CYCLELEN) << SPI_USR_DUMMY_CYCLELEN_S);
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// Setup Command Data
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if (cmd_bits) {
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// Enable COMMAND function in SPI module
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SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_COMMAND);
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// Align command data to high bits
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uint16_t command = cmd_data << (16 - cmd_bits);
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// Swap byte order
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command = ((command >> 8) & 0xff) | ((command << 8) & 0xff00);
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WRITE_PERI_REG(SPI_USER2(spi_no), (
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(((cmd_bits - 1) & SPI_USR_COMMAND_BITLEN) << SPI_USR_COMMAND_BITLEN_S) |
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(command & SPI_USR_COMMAND_VALUE)
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));
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}
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// Setup Address Data
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if (addr_bits) {
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// Enable ADDRess function in SPI module
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SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_ADDR);
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// Align address data to high bits
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WRITE_PERI_REG(SPI_ADDR(spi_no), addr_data << (32 - addr_bits));
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}
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// Setup DOUT data
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if (dout_bits) {
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// Enable MOSI function in SPI module
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SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI);
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// Copy data to W0
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if (READ_PERI_REG(SPI_USER(spi_no)) & SPI_WR_BYTE_ORDER) {
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WRITE_PERI_REG(SPI_W0(spi_no), dout_data << (32 - dout_bits));
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} else {
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uint8_t dout_extra_bits = dout_bits % 8;
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if (dout_extra_bits) {
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// If your data isn't a byte multiple (8/16/24/32 bits) and you
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// don't have SPI_WR_BYTE_ORDER set, you need this to move the
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// non-8bit remainder to the MSBs. Not sure if there's even a use
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// case for this, but it's here if you need it... For example,
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// 0xDA4 12 bits without SPI_WR_BYTE_ORDER would usually be output
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// as if it were 0x0DA4, of which 0xA4, and then 0x0 would be
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// shifted out (first 8 bits of low byte, then 4 MSB bits of high
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// byte - ie reverse byte order).
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// The code below shifts it out as 0xA4 followed by 0xD as you
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// might require.
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WRITE_PERI_REG(SPI_W0(spi_no), (
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(0xFFFFFFFF << (dout_bits - dout_extra_bits) & dout_data)
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<< (8 - dout_extra_bits) |
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((0xFFFFFFFF >> (32 - (dout_bits - dout_extra_bits)))
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& dout_data)
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));
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} else {
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WRITE_PERI_REG(SPI_W0(spi_no), dout_data);
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}
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}
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}
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// Begin SPI Transaction
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SET_PERI_REG_MASK(SPI_CMD(spi_no), SPI_USR);
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// Return DIN data
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if (din_bits) {
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while (spi_busy(spi_no)) {
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}
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; // Wait for SPI transaction to complete
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if (READ_PERI_REG(SPI_USER(spi_no)) & SPI_RD_BYTE_ORDER) {
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// Assuming data in is written to MSB. TBC
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return READ_PERI_REG(SPI_W0(spi_no)) >> (32 - din_bits);
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} else {
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// Read in the same way as DOUT is sent. Note existing contents of
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// SPI_W0 remain unless overwritten!
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return READ_PERI_REG(SPI_W0(spi_no));
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}
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return 0; // Something went wrong
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}
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// Transaction completed
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return 1; // Success
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}
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/*
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Just do minimal work needed to send 8 bits.
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*/
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inline void spi_tx8fast(uint8_t spi_no, uint8_t dout_data) {
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while (spi_busy(spi_no)) {
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}
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; // Wait for SPI to be ready
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// Enable SPI Functions
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// Disable MOSI, MISO, ADDR, COMMAND, DUMMY in case previously set.
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CLEAR_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI | SPI_USR_MISO |
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SPI_USR_COMMAND | SPI_USR_ADDR | SPI_USR_DUMMY);
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// Setup Bitlengths
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WRITE_PERI_REG(SPI_USER1(spi_no),
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// Number of bits to Send
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((8 - 1) & SPI_USR_MOSI_BITLEN) << SPI_USR_MOSI_BITLEN_S |
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// Number of bits to receive
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((8 - 1) & SPI_USR_MISO_BITLEN) << SPI_USR_MISO_BITLEN_S);
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// Setup DOUT data
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// Enable MOSI function in SPI module
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SET_PERI_REG_MASK(SPI_USER(spi_no), SPI_USR_MOSI);
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// Copy data to W0
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if (READ_PERI_REG(SPI_USER(spi_no)) & SPI_WR_BYTE_ORDER) {
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WRITE_PERI_REG(SPI_W0(spi_no), dout_data << (32 - 8));
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} else {
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WRITE_PERI_REG(SPI_W0(spi_no), dout_data);
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}
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// Begin SPI Transaction
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SET_PERI_REG_MASK(SPI_CMD(spi_no), SPI_USR);
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}
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