545 lines
18 KiB
C
545 lines
18 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2013, 2014 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "py/mpconfig.h"
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#include "py/misc.h"
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#include "py/mphal.h"
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#include "flash.h"
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#if defined(STM32G0)
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// These are not defined on the CMSIS header
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#define FLASH_FLAG_SR_ERRORS (FLASH_FLAG_OPERR | FLASH_FLAG_PROGERR | FLASH_FLAG_WRPERR | \
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FLASH_FLAG_PGAERR | FLASH_FLAG_SIZERR | FLASH_FLAG_PGSERR | \
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FLASH_FLAG_MISERR | FLASH_FLAG_FASTERR | FLASH_FLAG_RDERR | \
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FLASH_FLAG_OPTVERR)
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#if defined(FLASH_OPTR_DBANK)
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#define FLASH_FLAG_ECCR_ERRORS (FLASH_FLAG_ECCC | FLASH_FLAG_ECCD | FLASH_FLAG_ECCC2 | FLASH_FLAG_ECCD2)
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#else
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#define FLASH_FLAG_ECCR_ERRORS (FLASH_FLAG_ECCC | FLASH_FLAG_ECCD)
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#endif
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#define FLASH_FLAG_ALL_ERRORS (FLASH_FLAG_SR_ERRORS | FLASH_FLAG_ECCR_ERRORS)
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#endif
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#if MICROPY_HW_STM32WB_FLASH_SYNCRONISATION
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// See WB55 specific documentation in AN5289 Rev 3, and in particular, Figure 10.
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#include "rfcore.h"
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#include "stm32wbxx_ll_hsem.h"
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// Protects all flash registers.
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#define SEMID_FLASH_REGISTERS (2)
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// Used by CPU1 to prevent CPU2 from writing/erasing data in flash memory.
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#define SEMID_FLASH_CPU1 (6)
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// Used by CPU2 to prevent CPU1 from writing/erasing data in flash memory.
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#define SEMID_FLASH_CPU2 (7)
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#endif
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typedef struct {
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uint32_t base_address;
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uint32_t sector_size;
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uint32_t sector_count;
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} flash_layout_t;
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#if defined(STM32F0)
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static const flash_layout_t flash_layout[] = {
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{ FLASH_BASE, FLASH_PAGE_SIZE, (FLASH_BANK1_END + 1 - FLASH_BASE) / FLASH_PAGE_SIZE },
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};
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#elif defined(STM32F4)
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static const flash_layout_t flash_layout[] = {
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{ 0x08000000, 0x04000, 4 },
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{ 0x08010000, 0x10000, 1 },
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{ 0x08020000, 0x20000, 3 },
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#if defined(FLASH_SECTOR_8)
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{ 0x08080000, 0x20000, 4 },
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#endif
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#if defined(FLASH_SECTOR_12)
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{ 0x08100000, 0x04000, 4 },
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{ 0x08110000, 0x10000, 1 },
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{ 0x08120000, 0x20000, 7 },
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#endif
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};
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#elif defined(STM32F7)
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// FLASH_FLAG_PGSERR (Programming Sequence Error) was renamed to
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// FLASH_FLAG_ERSERR (Erasing Sequence Error) in STM32F7
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#define FLASH_FLAG_PGSERR FLASH_FLAG_ERSERR
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#if defined(STM32F722xx) || defined(STM32F723xx) || defined(STM32F732xx) || defined(STM32F733xx)
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static const flash_layout_t flash_layout[] = {
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{ 0x08000000, 0x04000, 4 },
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{ 0x08010000, 0x10000, 1 },
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{ 0x08020000, 0x20000, 3 },
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};
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#else
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// This is for dual-bank mode disabled
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static const flash_layout_t flash_layout[] = {
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{ 0x08000000, 0x08000, 4 },
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{ 0x08020000, 0x20000, 1 },
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#if FLASH_SECTOR_TOTAL == 8
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{ 0x08040000, 0x40000, 3 },
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#else
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{ 0x08040000, 0x40000, 7 },
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#endif
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};
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#endif
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#elif defined(STM32G0) || defined(STM32G4) || defined(STM32L0) || defined(STM32L4) || defined(STM32WB) || defined(STM32WL)
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static const flash_layout_t flash_layout[] = {
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{ (uint32_t)FLASH_BASE, (uint32_t)FLASH_PAGE_SIZE, 512 },
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};
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#elif defined(STM32L1)
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static const flash_layout_t flash_layout[] = {
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{ (uint32_t)FLASH_BASE, 0x200, 1024 },
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};
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#elif defined(STM32H5)
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static const flash_layout_t flash_layout[] = {
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{ 0x08000000, 8192, 256 },
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};
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#elif defined(STM32H7)
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static const flash_layout_t flash_layout[] = {
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{ 0x08000000, 0x20000, 16 },
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};
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#else
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#error Unsupported processor
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#endif
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#if defined(STM32H723xx) || defined(STM32H750xx)
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// get the bank of a given flash address
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static uint32_t get_bank(uint32_t addr) {
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return FLASH_BANK_1;
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}
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#elif (defined(STM32L4) && defined(SYSCFG_MEMRMP_FB_MODE)) || defined(STM32H5) || defined(STM32H7)
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// get the bank of a given flash address
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static uint32_t get_bank(uint32_t addr) {
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#if defined(STM32H5) || defined(STM32H7)
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if (READ_BIT(FLASH->OPTCR, FLASH_OPTCR_SWAP_BANK) == 0) {
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#else
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if (READ_BIT(SYSCFG->MEMRMP, SYSCFG_MEMRMP_FB_MODE) == 0) {
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#endif
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// no bank swap
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if (addr < (FLASH_BASE + FLASH_BANK_SIZE)) {
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return FLASH_BANK_1;
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} else {
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return FLASH_BANK_2;
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}
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} else {
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// bank swap
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if (addr < (FLASH_BASE + FLASH_BANK_SIZE)) {
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return FLASH_BANK_2;
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} else {
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return FLASH_BANK_1;
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}
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}
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}
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#if (defined(STM32L4) && defined(SYSCFG_MEMRMP_FB_MODE))
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// get the page of a given flash address
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static uint32_t get_page(uint32_t addr) {
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if (addr < (FLASH_BASE + FLASH_BANK_SIZE)) {
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// bank 1
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return (addr - FLASH_BASE) / FLASH_PAGE_SIZE;
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} else {
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// bank 2
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return (addr - (FLASH_BASE + FLASH_BANK_SIZE)) / FLASH_PAGE_SIZE;
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}
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}
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#endif
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#elif (defined(STM32L4) && !defined(SYSCFG_MEMRMP_FB_MODE)) || defined(STM32WB) || defined(STM32WL)
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static uint32_t get_page(uint32_t addr) {
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return (addr - FLASH_BASE) / FLASH_PAGE_SIZE;
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}
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#elif defined(STM32G0) || defined(STM32G4)
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static uint32_t get_page(uint32_t addr) {
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return (addr - FLASH_BASE) / FLASH_PAGE_SIZE;
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}
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static uint32_t get_bank(uint32_t addr) {
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// no bank swap
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if (addr < (FLASH_BASE + FLASH_BANK_SIZE)) {
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return FLASH_BANK_1;
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} else {
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#if defined(FLASH_OPTR_DBANK)
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return FLASH_BANK_2;
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#else
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return 0;
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#endif
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}
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}
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#endif
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bool flash_is_valid_addr(uint32_t addr) {
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uint8_t last = MP_ARRAY_SIZE(flash_layout) - 1;
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uint32_t end_of_flash = flash_layout[last].base_address +
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flash_layout[last].sector_count * flash_layout[last].sector_size;
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return flash_layout[0].base_address <= addr && addr < end_of_flash;
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}
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int32_t flash_get_sector_info(uint32_t addr, uint32_t *start_addr, uint32_t *size) {
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if (addr >= flash_layout[0].base_address) {
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uint32_t sector_index = 0;
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for (int i = 0; i < MP_ARRAY_SIZE(flash_layout); ++i) {
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for (int j = 0; j < flash_layout[i].sector_count; ++j) {
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uint32_t sector_start_next = flash_layout[i].base_address
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+ (j + 1) * flash_layout[i].sector_size;
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if (addr < sector_start_next) {
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if (start_addr != NULL) {
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*start_addr = flash_layout[i].base_address
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+ j * flash_layout[i].sector_size;
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}
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if (size != NULL) {
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*size = flash_layout[i].sector_size;
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}
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return sector_index;
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}
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++sector_index;
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}
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}
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}
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return -1;
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}
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int flash_erase(uint32_t flash_dest, uint32_t num_word32) {
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// check there is something to write
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if (num_word32 == 0) {
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return 0;
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}
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#if MICROPY_HW_STM32WB_FLASH_SYNCRONISATION
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// Acquire lock on the flash peripheral.
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while (LL_HSEM_1StepLock(HSEM, SEMID_FLASH_REGISTERS)) {
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}
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#endif
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// Unlock the flash for erase.
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HAL_FLASH_Unlock();
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#if MICROPY_HW_STM32WB_FLASH_SYNCRONISATION
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// Tell the HCI controller stack we're starting an erase, so it
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// avoids radio activity for a while.
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rfcore_start_flash_erase();
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// Wait for PES.
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while (LL_FLASH_IsActiveFlag_OperationSuspended()) {
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}
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// Wait for flash lock.
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while (LL_HSEM_1StepLock(HSEM, SEMID_FLASH_CPU2)) {
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}
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#endif
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// Clear pending flags (if any) and set up EraseInitStruct.
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FLASH_EraseInitTypeDef EraseInitStruct;
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#if defined(STM32F0)
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__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_WRPERR | FLASH_FLAG_PGERR);
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EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES;
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EraseInitStruct.PageAddress = flash_dest;
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EraseInitStruct.NbPages = (4 * num_word32 + FLASH_PAGE_SIZE - 4) / FLASH_PAGE_SIZE;
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#elif defined(STM32G0) || defined(STM32G4)
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__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ALL_ERRORS);
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EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES;
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EraseInitStruct.Page = get_page(flash_dest);
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EraseInitStruct.Banks = get_bank(flash_dest);
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EraseInitStruct.NbPages = (4 * num_word32 + FLASH_PAGE_SIZE - 4) / FLASH_PAGE_SIZE;
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#elif defined(STM32L0) || defined(STM32L1)
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__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR);
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EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES;
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EraseInitStruct.PageAddress = flash_dest;
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EraseInitStruct.NbPages = (4 * num_word32 + FLASH_PAGE_SIZE - 4) / FLASH_PAGE_SIZE;
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#elif (defined(STM32L4) && !defined(SYSCFG_MEMRMP_FB_MODE)) || defined(STM32WB) || defined(STM32WL)
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__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ALL_ERRORS);
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EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES;
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EraseInitStruct.Page = get_page(flash_dest);
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EraseInitStruct.NbPages = (4 * num_word32 + FLASH_PAGE_SIZE - 4) / FLASH_PAGE_SIZE;
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#elif defined(STM32L4)
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__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ALL_ERRORS);
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// The sector returned by flash_get_sector_info can not be used
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// as the flash has on each bank 0/1 pages 0..255
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EraseInitStruct.TypeErase = FLASH_TYPEERASE_PAGES;
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EraseInitStruct.Banks = get_bank(flash_dest);
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EraseInitStruct.Page = get_page(flash_dest);
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EraseInitStruct.NbPages = get_page(flash_dest + 4 * num_word32 - 1) - EraseInitStruct.Page + 1;
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#else
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#if defined(STM32H5)
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__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ALL_ERRORS);
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#elif defined(STM32H7)
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__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_ALL_ERRORS_BANK1 | FLASH_FLAG_ALL_ERRORS_BANK2);
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#elif defined(STM32L1)
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__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_WRPERR | FLASH_FLAG_PGAERR);
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#else
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__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |
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FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR | FLASH_FLAG_PGSERR);
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#endif
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EraseInitStruct.TypeErase = TYPEERASE_SECTORS;
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#if defined(FLASH_CR_PSIZE)
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EraseInitStruct.VoltageRange = VOLTAGE_RANGE_3; // voltage range needs to be 2.7V to 3.6V
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#elif !defined(STM32H5)
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EraseInitStruct.VoltageRange = 0; // unused parameter on STM32H7A3/B3
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#endif
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#if defined(STM32G0) || defined(STM32G4) || defined(STM32H5) || defined(STM32H7)
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EraseInitStruct.Banks = get_bank(flash_dest);
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#endif
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EraseInitStruct.Sector = flash_get_sector_info(flash_dest, NULL, NULL);
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EraseInitStruct.NbSectors = flash_get_sector_info(flash_dest + 4 * num_word32 - 1, NULL, NULL) - EraseInitStruct.Sector + 1;
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#if defined(STM32H5)
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EraseInitStruct.Sector &= 0x7f; // second bank should start counting at 0
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#endif
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#endif
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// Erase the sectors.
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uint32_t SectorError = 0;
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HAL_StatusTypeDef status = HAL_FLASHEx_Erase(&EraseInitStruct, &SectorError);
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#if MICROPY_HW_STM32WB_FLASH_SYNCRONISATION
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// Release flash lock.
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while (__HAL_FLASH_GET_FLAG(FLASH_FLAG_CFGBSY)) {
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}
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LL_HSEM_ReleaseLock(HSEM, SEMID_FLASH_CPU2, 0);
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// Tell HCI controller that erase is over.
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rfcore_end_flash_erase();
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#endif
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// Lock the flash after erase.
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HAL_FLASH_Lock();
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#if MICROPY_HW_STM32WB_FLASH_SYNCRONISATION
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// Release lock on the flash peripheral.
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LL_HSEM_ReleaseLock(HSEM, SEMID_FLASH_REGISTERS, 0);
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#endif
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return mp_hal_status_to_neg_errno(status);
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}
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/*
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// erase the sector using an interrupt
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void flash_erase_it(uint32_t flash_dest, uint32_t num_word32) {
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// check there is something to write
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if (num_word32 == 0) {
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return;
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}
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// unlock
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HAL_FLASH_Unlock();
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// Clear pending flags (if any)
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__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |
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FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR|FLASH_FLAG_PGSERR);
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// erase the sector(s)
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FLASH_EraseInitTypeDef EraseInitStruct;
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EraseInitStruct.TypeErase = TYPEERASE_SECTORS;
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EraseInitStruct.VoltageRange = VOLTAGE_RANGE_3; // voltage range needs to be 2.7V to 3.6V
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EraseInitStruct.Sector = flash_get_sector_info(flash_dest, NULL, NULL);
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EraseInitStruct.NbSectors = flash_get_sector_info(flash_dest + 4 * num_word32 - 1, NULL, NULL) - EraseInitStruct.Sector + 1;
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if (HAL_FLASHEx_Erase_IT(&EraseInitStruct) != HAL_OK) {
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// error occurred during sector erase
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HAL_FLASH_Lock(); // lock the flash
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return;
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}
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}
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*/
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int flash_write(uint32_t flash_dest, const uint32_t *src, uint32_t num_word32) {
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#if MICROPY_HW_STM32WB_FLASH_SYNCRONISATION
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// Acquire lock on the flash peripheral.
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while (LL_HSEM_1StepLock(HSEM, SEMID_FLASH_REGISTERS)) {
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}
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#endif
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// Unlock the flash for write.
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HAL_FLASH_Unlock();
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#if MICROPY_HW_STM32WB_FLASH_SYNCRONISATION
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// Wait for PES.
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while (LL_FLASH_IsActiveFlag_OperationSuspended()) {
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}
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#endif
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HAL_StatusTypeDef status = HAL_OK;
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#if defined(STM32G0) || defined(STM32G4) || defined(STM32L4) || defined(STM32WB) || defined(STM32WL)
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// program the flash uint64 by uint64
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for (int i = 0; i < num_word32 / 2; i++) {
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uint64_t val = *(uint64_t *)src;
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#if MICROPY_HW_STM32WB_FLASH_SYNCRONISATION
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// Wait for flash lock.
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while (LL_HSEM_1StepLock(HSEM, SEMID_FLASH_CPU2)) {
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}
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#endif
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status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, flash_dest, val);
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#if MICROPY_HW_STM32WB_FLASH_SYNCRONISATION
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// Release flash lock.
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LL_HSEM_ReleaseLock(HSEM, SEMID_FLASH_CPU2, 0);
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while (__HAL_FLASH_GET_FLAG(FLASH_FLAG_CFGBSY)) {
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}
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#endif
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if (status != HAL_OK) {
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num_word32 = 0; // don't write any odd word after this loop
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break;
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}
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flash_dest += 8;
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src += 2;
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}
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if ((num_word32 & 0x01) == 1) {
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uint64_t val = *(uint64_t *)flash_dest;
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val = (val & 0xffffffff00000000uL) | (*src);
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#if MICROPY_HW_STM32WB_FLASH_SYNCRONISATION
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// Wait for flash lock.
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while (LL_HSEM_1StepLock(HSEM, SEMID_FLASH_CPU2)) {
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}
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#endif
|
|
|
|
status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_DOUBLEWORD, flash_dest, val);
|
|
|
|
#if MICROPY_HW_STM32WB_FLASH_SYNCRONISATION
|
|
// Release flash lock.
|
|
LL_HSEM_ReleaseLock(HSEM, SEMID_FLASH_CPU2, 0);
|
|
while (__HAL_FLASH_GET_FLAG(FLASH_FLAG_CFGBSY)) {
|
|
}
|
|
#endif
|
|
}
|
|
|
|
#elif defined(STM32H5)
|
|
|
|
// program the flash 128 bits (4 words) at a time
|
|
for (int i = 0; i < num_word32 / 4; i++) {
|
|
status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_QUADWORD, flash_dest, (uint64_t)(uint32_t)src);
|
|
if (status != HAL_OK) {
|
|
break;
|
|
}
|
|
flash_dest += 16;
|
|
src += 4;
|
|
}
|
|
|
|
#elif defined(STM32H7)
|
|
|
|
// program the flash 256 bits at a time
|
|
for (int i = 0; i < num_word32 / 8; i++) {
|
|
status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_FLASHWORD, flash_dest, (uint64_t)(uint32_t)src);
|
|
if (status != HAL_OK) {
|
|
break;
|
|
}
|
|
flash_dest += 32;
|
|
src += 8;
|
|
}
|
|
|
|
#else
|
|
|
|
// program the flash word by word
|
|
for (int i = 0; i < num_word32; i++) {
|
|
status = HAL_FLASH_Program(FLASH_TYPEPROGRAM_WORD, flash_dest, *src);
|
|
if (status != HAL_OK) {
|
|
break;
|
|
}
|
|
flash_dest += 4;
|
|
src += 1;
|
|
}
|
|
|
|
#endif
|
|
|
|
// Lock the flash after write.
|
|
HAL_FLASH_Lock();
|
|
|
|
#if MICROPY_HW_STM32WB_FLASH_SYNCRONISATION
|
|
// Release lock on the flash peripheral.
|
|
LL_HSEM_ReleaseLock(HSEM, SEMID_FLASH_REGISTERS, 0);
|
|
#endif
|
|
|
|
return mp_hal_status_to_neg_errno(status);
|
|
}
|
|
|
|
/*
|
|
use erase, then write
|
|
void flash_erase_and_write(uint32_t flash_dest, const uint32_t *src, uint32_t num_word32) {
|
|
// check there is something to write
|
|
if (num_word32 == 0) {
|
|
return;
|
|
}
|
|
|
|
// unlock
|
|
HAL_FLASH_Unlock();
|
|
|
|
// Clear pending flags (if any)
|
|
__HAL_FLASH_CLEAR_FLAG(FLASH_FLAG_EOP | FLASH_FLAG_OPERR | FLASH_FLAG_WRPERR |
|
|
FLASH_FLAG_PGAERR | FLASH_FLAG_PGPERR|FLASH_FLAG_PGSERR);
|
|
|
|
// erase the sector(s)
|
|
FLASH_EraseInitTypeDef EraseInitStruct;
|
|
EraseInitStruct.TypeErase = TYPEERASE_SECTORS;
|
|
EraseInitStruct.VoltageRange = VOLTAGE_RANGE_3; // voltage range needs to be 2.7V to 3.6V
|
|
EraseInitStruct.Sector = flash_get_sector_info(flash_dest, NULL, NULL);
|
|
EraseInitStruct.NbSectors = flash_get_sector_info(flash_dest + 4 * num_word32 - 1, NULL, NULL) - EraseInitStruct.Sector + 1;
|
|
uint32_t SectorError = 0;
|
|
if (HAL_FLASHEx_Erase(&EraseInitStruct, &SectorError) != HAL_OK) {
|
|
// error occurred during sector erase
|
|
HAL_FLASH_Lock(); // lock the flash
|
|
return;
|
|
}
|
|
|
|
// program the flash word by word
|
|
for (int i = 0; i < num_word32; i++) {
|
|
if (HAL_FLASH_Program(TYPEPROGRAM_WORD, flash_dest, *src) != HAL_OK) {
|
|
// error occurred during flash write
|
|
HAL_FLASH_Lock(); // lock the flash
|
|
return;
|
|
}
|
|
flash_dest += 4;
|
|
src += 1;
|
|
}
|
|
|
|
// lock the flash
|
|
HAL_FLASH_Lock();
|
|
}
|
|
*/
|