141750ff79
With using UART FIFO, the timeout should be long enough that FIFO becomes empty. Since previous data transfer may be ongoing, the timeout must be timeout_char multiplied by FIFO size + 1. Signed-off-by: Yuuki NAGAO <wf.yn386@gmail.com> |
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| bare-arm | ||
| cc3200 | ||
| embed | ||
| esp32 | ||
| esp8266 | ||
| mimxrt | ||
| minimal | ||
| nrf | ||
| pic16bit | ||
| powerpc | ||
| qemu-arm | ||
| renesas-ra | ||
| rp2 | ||
| samd | ||
| stm32 | ||
| teensy | ||
| unix | ||
| webassembly | ||
| windows | ||
| zephyr | ||