439 lines
14 KiB
C
439 lines
14 KiB
C
/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021 Renesas Electronics Corporation
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* Copyright (c) 2023 Vekatech Ltd.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include <stdbool.h>
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#include "py/mpconfig.h"
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#include "hal_data.h"
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#include "ra_config.h"
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#include "ra_utils.h"
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#include "ra_flash.h"
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#if !defined(USE_FSP_FLASH)
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#define USE_FSP_FLASH
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#endif
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#if defined(USE_FSP_FLASH)
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#if defined(__GNUC__)
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#pragma GCC diagnostic ignored "-Wunused-parameter"
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#pragma GCC diagnostic ignored "-Wmissing-declarations"
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#endif
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/* Flags, set from Callback function */
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static volatile _Bool g_b_flash_event_not_blank = false;
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static volatile _Bool g_b_flash_event_blank = false;
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static volatile _Bool g_b_flash_event_erase_complete = false;
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static volatile _Bool g_b_flash_event_write_complete = false;
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static uint8_t flash_buf[FLASH_BUF_SIZE] __attribute__((aligned(2)));
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#ifdef USE_FSP_QSPI
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#if MICROPY_HW_HAS_QSPI_FLASH
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static bool r_qspi_get_QE(void) {
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/* Enter direct communication mode */
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R_QSPI->SFMCMD = 1U;
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R_QSPI->SFMCOM = 0x35;
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bool sts = (R_QSPI->SFMCOM >> 1) & 1;
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/* Close the SPI bus cycle. Reference section 39.10.3 "Generating the SPI Bus Cycle during Direct Communication"
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* in the RA6M3 manual R01UH0886EJ0100. */
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R_QSPI->SFMCMD = 1U;
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/* Exit direct communication mode */
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R_QSPI->SFMCMD = 0U;
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return sts;
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}
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static void r_qspi_set_QE(qspi_instance_ctrl_t *p_instance_ctrl) {
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/* Enter direct communication mode */
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R_QSPI->SFMCMD = 1U;
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/* Enable write. */
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R_QSPI->SFMCOM = p_instance_ctrl->p_cfg->write_enable_command;
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/* Close the SPI bus cycle. Reference section 39.10.3 "Generating the SPI Bus Cycle during Direct Communication"
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* in the RA6M3 manual R01UH0886EJ0100. */
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R_QSPI->SFMCMD = 1U;
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R_QSPI->SFMCOM = 0x31;
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R_QSPI->SFMCOM = 0x02;
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/* Close the SPI bus cycle. Reference section 39.10.3 "Generating the SPI Bus Cycle during Direct Communication"
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* in the RA6M3 manual R01UH0886EJ0100. */
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R_QSPI->SFMCMD = 1U;
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/* Exit direct communication mode */
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R_QSPI->SFMCMD = 0U;
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}
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static void r_qspi_wait_WIP(qspi_instance_ctrl_t *p_instance_ctrl) {
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/* Enter direct communication mode */
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R_QSPI->SFMCMD = 1U;
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R_QSPI->SFMCOM = p_instance_ctrl->p_cfg->status_command;
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while ((R_QSPI->SFMCOM >> p_instance_ctrl->p_cfg->write_status_bit) & 1) {
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;
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}
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/* Close the SPI bus cycle. Reference section 39.10.3 "Generating the SPI Bus Cycle during Direct Communication"
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* in the RA6M3 manual R01UH0886EJ0100. */
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R_QSPI->SFMCMD = 1U;
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/* Exit direct communication mode */
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R_QSPI->SFMCMD = 0U;
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}
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static fsp_err_t R_QSPI_QuadEnable(spi_flash_ctrl_t *p_ctrl) {
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qspi_instance_ctrl_t *p_instance_ctrl = (qspi_instance_ctrl_t *)p_ctrl;
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#if QSPI_CFG_PARAM_CHECKING_ENABLE
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FSP_ASSERT(NULL != p_instance_ctrl);
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FSP_ASSERT(NULL != p_status);
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FSP_ERROR_RETURN(QSPI_PRV_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN);
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/* Do not enter direct communication mode from XIP mode. Reference note in section 39.10.2 "Using Direct
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* Communication Mode" in the RA6M3 manual R01UH0886EJ0100. */
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FSP_ERROR_RETURN(0U == R_QSPI->SFMSDC_b.SFMXST, FSP_ERR_INVALID_MODE);
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#endif
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/* Read device status. */
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if (!r_qspi_get_QE()) {
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r_qspi_set_QE(p_instance_ctrl);
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}
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return FSP_SUCCESS;
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}
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static fsp_err_t R_QSPI_Wait_WIP(spi_flash_ctrl_t *p_ctrl) {
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qspi_instance_ctrl_t *p_instance_ctrl = (qspi_instance_ctrl_t *)p_ctrl;
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#if QSPI_CFG_PARAM_CHECKING_ENABLE
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FSP_ASSERT(NULL != p_instance_ctrl);
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FSP_ASSERT(NULL != p_status);
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FSP_ERROR_RETURN(QSPI_PRV_OPEN == p_instance_ctrl->open, FSP_ERR_NOT_OPEN);
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/* Do not enter direct communication mode from XIP mode. Reference note in section 39.10.2 "Using Direct
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* Communication Mode" in the RA6M3 manual R01UH0886EJ0100. */
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FSP_ERROR_RETURN(0U == R_QSPI->SFMSDC_b.SFMXST, FSP_ERR_INVALID_MODE);
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#endif
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/* Wait WIP flag to go 0 */
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r_qspi_wait_WIP(p_instance_ctrl);
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return FSP_SUCCESS;
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}
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static bool lmemprob(void *dst, size_t len) {
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uint8_t *p;
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for (p = (uint8_t *)dst; ((len > 0) && (p[0] == 0xFF)); len--) {
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p++;
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}
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return len? false : true;
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}
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#endif
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#endif
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void *FLASH_SECTION lmemset(void *dst, int c, size_t len) {
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char *p;
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for (p = (char *)dst; len > 0; len--) {
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*(p++) = (char)c;
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}
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return (void *)dst;
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}
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void *FLASH_SECTION lmemcpy(void *dst, const void *src, size_t len) {
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char *d = (char *)dst;
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const char *s = (const char *)src;
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for (; len > 0; len--) {
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*(d++) = *(s++);
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}
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return (void *)dst;
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}
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int FLASH_SECTION lmemcmp(const void *p1, const void *p2, size_t len) {
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unsigned char *a, *b;
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size_t i;
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a = (unsigned char *)p1;
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b = (unsigned char *)p2;
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for (i = 0; i < len; i++) {
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if (*a != *b) {
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return (*a < *b) ? -1 : 1;
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}
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a++;
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b++;
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}
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return (int)0;
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}
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#if defined(RA4M1) | defined(RA4M3) | defined(RA4W1) | MICROPY_HW_HAS_QSPI_FLASH
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uint32_t FLASH_SECTION sector_size(uint32_t addr) {
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return FLASH_SECTOR_SIZE;
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}
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uint32_t FLASH_SECTION sector_start(uint32_t addr) {
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return addr & ~(FLASH_SECTOR_SIZE - 1);
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}
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uint32_t FLASH_SECTION sector_index(uint32_t addr) {
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return (addr - 0x00000000) / FLASH_SECTOR_SIZE;
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}
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#elif defined(RA6M1) | defined(RA6M2) | defined(RA6M3) | defined(RA6M5)
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#define REGION1_SECTOR_SIZE 0x8000 // 32K
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#define REGION1_SECTOR_MAX 14
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#define REGION0_SECTOR_SIZE 0x2000 // 8K
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#define REGION0_SECTOR_MAX 8
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uint32_t FLASH_SECTION sector_size(uint32_t addr) {
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if (addr < 0x00010000) {
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return REGION0_SECTOR_SIZE;
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} else {
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return REGION1_SECTOR_SIZE;
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}
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}
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uint32_t FLASH_SECTION sector_start(uint32_t addr) {
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if (addr < 0x00010000) {
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return addr & ~(REGION0_SECTOR_SIZE - 1);
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} else {
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return addr & ~(REGION1_SECTOR_SIZE - 1);
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}
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}
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uint32_t FLASH_SECTION sector_index(uint32_t addr) {
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if (addr < 0x00010000) {
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return (addr - 0x00000000) / REGION0_SECTOR_SIZE;
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} else {
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return ((addr - 0x00010000) / REGION1_SECTOR_SIZE) + REGION0_SECTOR_SIZE;
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}
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}
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#else
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#error "CMSIS MCU Series is not specified."
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#endif
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bool internal_flash_read(uint8_t *addr, uint32_t NumBytes, uint8_t *pSectorBuff) {
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CHIP_WORD *startaddr = (CHIP_WORD *)addr;
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CHIP_WORD *endaddr = (CHIP_WORD *)(addr + NumBytes);
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while (startaddr < endaddr) {
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*pSectorBuff++ = *startaddr++;
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}
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return true;
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}
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bool internal_flash_write(uint8_t *addr, uint32_t NumBytes, uint8_t *pSectorBuff, bool ReadModifyWrite) {
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return internal_flash_writex(addr, NumBytes, pSectorBuff, ReadModifyWrite, true);
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}
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bool internal_flash_writex(uint8_t *addr, uint32_t NumBytes, uint8_t *pSectorBuff, bool ReadModifyWrite, bool fIncrementDataPtr) {
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fsp_err_t err = FSP_SUCCESS;
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bool flag;
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uint32_t count;
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uint8_t *buf_addr = (uint8_t *)&flash_buf[0];
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uint32_t startaddr = (uint32_t)addr & FLASH_BUF_ADDR_MASK;
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uint32_t offset = (uint32_t)addr & FLASH_BUF_OFF_MASK;
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uint32_t endaddr = (uint32_t)addr + NumBytes;
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uint32_t error_code = 0;
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while (startaddr < endaddr) {
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// copy from dst rom addr to flash buffer to keep current data
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lmemcpy(flash_buf, (void *)startaddr, FLASH_BUF_SIZE);
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// memset(flash_buf, 0xff, FLASH_BUF_SIZE);
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if (NumBytes + offset > FLASH_BUF_SIZE) {
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count = FLASH_BUF_SIZE - offset;
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NumBytes -= count;
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} else {
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count = NumBytes;
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}
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// overwrite data from src addr to flash buffer
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if (fIncrementDataPtr) {
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lmemcpy(flash_buf + offset, pSectorBuff, count);
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} else {
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lmemset(flash_buf + offset, (int)*pSectorBuff, count);
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}
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g_b_flash_event_write_complete = false;
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uint8_t *flash_addr = (uint8_t *)((uint32_t)startaddr & FLASH_BUF_ADDR_MASK);
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#if MICROPY_HW_HAS_QSPI_FLASH
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for (uint16_t idx = 0; ((err == FSP_SUCCESS) && (idx < FLASH_SECTOR_SIZE)); idx += FLASH_PAGE_SIZE)
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{
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err = R_QSPI_Write(&g_qspi0_ctrl, &buf_addr[idx], &flash_addr[idx], FLASH_PAGE_SIZE);
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err = R_QSPI_Wait_WIP(&g_qspi0_ctrl);
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}
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#else
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uint32_t state = ra_disable_irq();
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#if defined(RA4M1) | defined(RA4M3) | defined(RA4W1)
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err = R_FLASH_LP_Write(&g_flash0_ctrl, (uint32_t const)buf_addr, (uint32_t)flash_addr, FLASH_SECTOR_SIZE);
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#elif defined(RA6M1) | defined(RA6M2) | defined(RA6M3) | defined(RA6M5)
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err = R_FLASH_HP_Write(&g_flash0_ctrl, (uint32_t const)buf_addr, (uint32_t)flash_addr, FLASH_SECTOR_SIZE);
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#else
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#error "CMSIS MCU Series is not specified."
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#endif
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ra_enable_irq(state);
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#endif
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if (FSP_SUCCESS != err) {
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error_code = 1;
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goto WriteX_exit;
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}
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if (fIncrementDataPtr) {
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flag = (lmemcmp((void *)(startaddr + offset), flash_buf + offset, count) == 0);
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if (!flag) {
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error_code = 2;
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break;
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}
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}
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offset = 0;
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startaddr += FLASH_BUF_SIZE;
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pSectorBuff += count;
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}
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WriteX_exit:
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if (error_code == 0) {
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return true;
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}
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return false;
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}
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bool internal_flash_memset(uint8_t *addr, uint8_t Data, uint32_t NumBytes) {
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return true;
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}
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bool internal_flash_isblockerased(uint8_t *addr, uint32_t BlockLength) {
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g_b_flash_event_not_blank = false;
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g_b_flash_event_blank = false;
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#if MICROPY_HW_HAS_QSPI_FLASH
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return lmemprob((uint8_t *)((uint32_t)addr & FLASH_BUF_ADDR_MASK), FLASH_SECTOR_SIZE);
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#else
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fsp_err_t err = FSP_SUCCESS;
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flash_result_t blankCheck = FLASH_RESULT_BLANK;
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uint32_t state = ra_disable_irq();
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#if defined(RA4M1) | defined(RA4M3) | defined(RA4W1)
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err = R_FLASH_LP_BlankCheck(&g_flash0_ctrl, (uint32_t const)((uint32_t)addr & FLASH_BUF_ADDR_MASK), FLASH_SECTOR_SIZE, &blankCheck);
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#elif defined(RA6M1) | defined(RA6M2) | defined(RA6M3) | defined(RA6M5)
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err = R_FLASH_HP_BlankCheck(&g_flash0_ctrl, (uint32_t const)((uint32_t)addr & FLASH_BUF_ADDR_MASK), FLASH_SECTOR_SIZE, &blankCheck);
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#else
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#error "CMSIS MCU Series is not specified."
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#endif
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ra_enable_irq(state);
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if (err == FSP_SUCCESS) {
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if (FLASH_RESULT_BLANK == blankCheck) {
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return true;
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} else {
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return false;
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}
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} else {
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return false;
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}
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#endif
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}
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bool internal_flash_eraseblock(uint8_t *addr) {
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uint32_t error_code = 0;
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fsp_err_t err = FSP_SUCCESS;
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g_b_flash_event_erase_complete = false;
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#if MICROPY_HW_HAS_QSPI_FLASH
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if (!lmemprob((uint8_t *)((uint32_t)addr & FLASH_BUF_ADDR_MASK), FLASH_SECTOR_SIZE)) {
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err = R_QSPI_Erase(&g_qspi0_ctrl, (uint8_t *const)addr, FLASH_SECTOR_SIZE);
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err = R_QSPI_Wait_WIP(&g_qspi0_ctrl);
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}
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#else
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uint32_t state = ra_disable_irq();
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#if defined(RA4M1) | defined(RA4M3) | defined(RA4W1)
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err = R_FLASH_LP_Erase(&g_flash0_ctrl, (uint32_t const)addr, 1);
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#elif defined(RA6M1) | defined(RA6M2) | defined(RA6M3) | defined(RA6M5)
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err = R_FLASH_HP_Erase(&g_flash0_ctrl, (uint32_t const)addr, 1);
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#else
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#error "CMSIS MCU Series is not specified."
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#endif
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ra_enable_irq(state);
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#endif
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if (err == FSP_SUCCESS) {
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error_code = 0;
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} else {
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error_code = 1;
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}
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if (error_code == 0) {
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return true;
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}
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return false;
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}
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/* Callback function */
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void callback_flash(flash_callback_args_t *p_args) {
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/* TODO: add your own code here */
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switch (p_args->event) {
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case FLASH_EVENT_NOT_BLANK:
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g_b_flash_event_not_blank = true;
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break;
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case FLASH_EVENT_BLANK:
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g_b_flash_event_blank = true;
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break;
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case FLASH_EVENT_ERASE_COMPLETE:
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g_b_flash_event_erase_complete = true;
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break;
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case FLASH_EVENT_WRITE_COMPLETE:
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g_b_flash_event_write_complete = true;
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break;
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default:
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/* Do nothing */
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break;
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}
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}
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bool internal_flash_init(void) {
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fsp_err_t err = FSP_SUCCESS;
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#if MICROPY_HW_HAS_QSPI_FLASH
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err = R_QSPI_Open(&g_qspi0_ctrl, &g_qspi0_cfg);
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if (err == FSP_SUCCESS) {
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R_QSPI_QuadEnable(&g_qspi0_ctrl);
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return true;
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} else {
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return false;
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}
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#else
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#if defined(RA4M1) | defined(RA4M3) | defined(RA4W1)
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err = R_FLASH_LP_Open(&g_flash0_ctrl, &g_flash0_cfg);
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#elif defined(RA6M1) | defined(RA6M2) | defined(RA6M3) | defined(RA6M5)
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err = R_FLASH_HP_Open(&g_flash0_ctrl, &g_flash0_cfg);
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#else
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#error "CMSIS MCU Series is not specified."
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#endif
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if (err == FSP_SUCCESS) {
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return true;
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} else {
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return false;
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}
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#endif
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}
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#else
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// ToDo: implementation
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#endif
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