534 lines
14 KiB
Makefile
534 lines
14 KiB
Makefile
# Select the board to build for:
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ifdef BOARD_DIR
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# Custom board path - remove trailing slash and get the final component of
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# the path as the board name.
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BOARD ?= $(notdir $(BOARD_DIR:/=))
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else
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# If not given on the command line, then default to RA6M2_EK.
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BOARD ?= EK_RA6M2
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BOARD_DIR ?= boards/$(BOARD)
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endif
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ifeq ($(wildcard $(BOARD_DIR)/.),)
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$(error Invalid BOARD specified: $(BOARD_DIR))
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endif
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# If the build directory is not given, make it reflect the board name.
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BUILD ?= build-$(BOARD)
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ifeq ($(BOARD),RA4M1_CLICKER)
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BOARD_LOW = ra4m1_ek
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CMSIS_MCU_LOW = ra4m1
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CMSIS_MCU_CAP = RA4M1
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USE_FSP_LPM = 0
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endif
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ifeq ($(BOARD),EK_RA4M1)
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BOARD_LOW = ra4m1_ek
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CMSIS_MCU_LOW = ra4m1
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CMSIS_MCU_CAP = RA4M1
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USE_FSP_LPM = 0
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endif
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ifeq ($(BOARD),EK_RA4W1)
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BOARD_LOW = ra4w1_ek
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CMSIS_MCU_LOW = ra4w1
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CMSIS_MCU_CAP = RA4W1
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USE_FSP_LPM = 1
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endif
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ifeq ($(BOARD),EK_RA6M1)
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BOARD_LOW = ra6m1_ek
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CMSIS_MCU_LOW = ra6m1
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CMSIS_MCU_CAP = RA6M1
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USE_FSP_LPM = 1
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endif
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ifeq ($(BOARD),EK_RA6M2)
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BOARD_LOW = ra6m2_ek
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CMSIS_MCU_LOW = ra6m2
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CMSIS_MCU_CAP = RA6M2
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USE_FSP_LPM = 1
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endif
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# select use wrapper function of FSP library
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USE_FSP_FLASH = 1
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include ../../py/mkenv.mk
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-include mpconfigport.mk
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include $(BOARD_DIR)/mpconfigboard.mk
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# Files that are generated and needed before the QSTR build.
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#QSTR_GENERATED_HEADERS = $(BUILD)/pins_qstr.h $(BUILD)/modstm_qstr.h
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QSTR_GENERATED_HEADERS = $(BUILD)/pins_qstr.h
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# qstr definitions (must come before including py.mk)
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QSTR_DEFS += qstrdefsport.h $(QSTR_GENERATED_HEADERS)
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QSTR_GLOBAL_DEPENDENCIES += mpconfigboard_common.h $(BOARD_DIR)/mpconfigboard.h $(QSTR_GENERATED_HEADERS)
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# MicroPython feature configurations
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MICROPY_ROM_TEXT_COMPRESSION ?= 1
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# File containing description of content to be frozen into firmware.
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FROZEN_MANIFEST ?= boards/manifest.py
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# include py core make definitions
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include $(TOP)/py/py.mk
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include $(TOP)/extmod/extmod.mk
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GIT_SUBMODULES += lib/fsp
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MCU_SERIES_UPPER = $(shell echo $(MCU_SERIES) | tr '[:lower:]' '[:upper:]')
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CMSIS_MCU_LOWER = $(shell echo $(CMSIS_MCU) | tr '[:upper:]' '[:lower:]')
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LD_DIR=boards
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CMSIS_DIR=lib/cmsis/inc
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HAL_DIR=lib/fsp
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STARTUP_FILE ?= lib/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/startup.o
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SYSTEM_FILE ?= lib/fsp/ra/fsp/src/bsp/cmsis/Device/RENESAS/Source/system.o
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# Select the cross compile prefix
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CROSS_COMPILE ?= arm-none-eabi-
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INC += -I.
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INC += -I$(TOP)
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INC += -I$(BUILD)
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INC += -I$(TOP)/$(CMSIS_DIR)
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INC += -I$(TOP)/$(HAL_DIR)
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INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/inc
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INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/inc/api
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INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/inc/instances
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INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include
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#INC += -Ilwip_inc
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ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA4M1 RA4W1 RA6M1 RA6M2))
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INC += -Ira
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endif
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INC += -I$(BOARD_DIR)/ra_gen
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INC += -I$(BOARD_DIR)/ra_cfg/fsp_cfg
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INC += -I$(BOARD_DIR)/ra_cfg/fsp_cfg/bsp
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INC += -Idebug
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CFLAGS += -D$(CMSIS_MCU)
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CFLAGS += -DRA_HAL_H='<$(CMSIS_MCU)_hal.h>'
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# Basic Cortex-M flags
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CFLAGS_CORTEX_M = -mthumb
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# Select hardware floating-point support
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SUPPORTS_HARDWARE_FP_SINGLE = 0
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SUPPORTS_HARDWARE_FP_DOUBLE = 0
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ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES),m4))
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CFLAGS_CORTEX_M += -mfpu=fpv4-sp-d16 -mfloat-abi=hard
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SUPPORTS_HARDWARE_FP_SINGLE = 1
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endif
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# Options for particular MCU series
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CFLAGS_MCU_RA4M1 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
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CFLAGS_MCU_RA4W1 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
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CFLAGS_MCU_RA6M1 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
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CFLAGS_MCU_RA6M2 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
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CFLAGS += $(INC) -Wall -Wpointer-arith -Werror -Wdouble-promotion -Wfloat-conversion -std=gnu99 -nostdlib $(CFLAGS_EXTRA)
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#CFLAGS += -D$(CMSIS_MCU)
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CFLAGS += $(CFLAGS_MCU_$(CMSIS_MCU))
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CFLAGS += $(COPT)
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CFLAGS += -I$(BOARD_DIR)
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# Configure floating point support
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ifeq ($(MICROPY_FLOAT_IMPL),double)
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CFLAGS += -DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_DOUBLE
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else
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ifeq ($(MICROPY_FLOAT_IMPL),none)
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CFLAGS += -DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_NONE
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else
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CFLAGS += -DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_FLOAT
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CFLAGS += -fsingle-precision-constant
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endif
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endif
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LDFLAGS += -nostdlib -L $(LD_DIR) $(addprefix -T,$(LD_FILES)) -Map=$(@:.elf=.map) --cref
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LDFLAGS += --defsym=_estack_reserve=8
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LIBS += "$(shell $(CC) $(CFLAGS) -print-libgcc-file-name)"
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# Remove uncalled code from the final image.
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CFLAGS += -fdata-sections -ffunction-sections
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LDFLAGS += --gc-sections
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# Debugging/Optimization
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CFLAGS += -g # always include debug info in the ELF
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ifeq ($(DEBUG), 1)
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CFLAGS += -DPENDSV_DEBUG
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#COPT = -Og
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COPT = -Os
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# Disable text compression in debug builds
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MICROPY_ROM_TEXT_COMPRESSION = 0
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else
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COPT += -Os -DNDEBUG
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endif
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# Flags for optional C++ source code
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CXXFLAGS += $(filter-out -Wmissing-prototypes -Wold-style-definition -std=gnu99,$(CFLAGS))
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# TODO make this common -- shouldn't be using these "private" vars from py.mk
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ifneq ($(SRC_CXX)$(SRC_USERMOD_CXX)$(SRC_USERMOD_LIB_CXX),)
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LIBSTDCPP_FILE_NAME = "$(shell $(CXX) $(CXXFLAGS) -print-file-name=libstdc++.a)"
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LDFLAGS += -L"$(shell dirname $(LIBSTDCPP_FILE_NAME))"
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endif
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# Options for mpy-cross
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MPY_CROSS_FLAGS += -march=armv7m
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SHARED_SRC_C += $(addprefix shared/,\
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libc/string0.c \
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netutils/dhcpserver.c \
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netutils/netutils.c \
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netutils/trace.c \
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readline/readline.c \
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runtime/gchelper_native.c \
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runtime/interrupt_char.c \
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runtime/mpirq.c \
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runtime/pyexec.c \
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runtime/softtimer.c \
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runtime/stdout_helpers.c \
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runtime/sys_stdio_mphal.c \
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timeutils/timeutils.c \
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)
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ifeq ($(MICROPY_FLOAT_IMPL),double)
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LIBM_SRC_C += $(addprefix lib/libm_dbl/,\
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__cos.c \
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__expo2.c \
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__fpclassify.c \
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__rem_pio2.c \
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__rem_pio2_large.c \
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__signbit.c \
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__sin.c \
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__tan.c \
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acos.c \
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acosh.c \
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asin.c \
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asinh.c \
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atan.c \
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atan2.c \
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atanh.c \
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ceil.c \
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cos.c \
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cosh.c \
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copysign.c \
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erf.c \
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exp.c \
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expm1.c \
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floor.c \
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fmod.c \
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frexp.c \
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ldexp.c \
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lgamma.c \
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log.c \
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log10.c \
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log1p.c \
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modf.c \
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nearbyint.c \
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pow.c \
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rint.c \
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round.c \
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scalbn.c \
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sin.c \
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sinh.c \
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tan.c \
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tanh.c \
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tgamma.c \
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trunc.c \
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)
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ifeq ($(SUPPORTS_HARDWARE_FP_DOUBLE),1)
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LIBM_SRC_C += lib/libm_dbl/thumb_vfp_sqrt.c
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else
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LIBM_SRC_C += lib/libm_dbl/sqrt.c
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endif
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else
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LIBM_SRC_C += $(addprefix lib/libm/,\
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math.c \
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acoshf.c \
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asinfacosf.c \
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asinhf.c \
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atan2f.c \
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atanf.c \
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atanhf.c \
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ef_rem_pio2.c \
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erf_lgamma.c \
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fmodf.c \
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kf_cos.c \
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kf_rem_pio2.c \
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kf_sin.c \
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kf_tan.c \
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log1pf.c \
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nearbyintf.c \
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roundf.c \
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sf_cos.c \
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sf_erf.c \
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sf_frexp.c \
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sf_ldexp.c \
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sf_modf.c \
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sf_sin.c \
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sf_tan.c \
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wf_lgamma.c \
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wf_tgamma.c \
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)
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ifeq ($(SUPPORTS_HARDWARE_FP_SINGLE),1)
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LIBM_SRC_C += lib/libm/thumb_vfp_sqrtf.c
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else
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LIBM_SRC_C += lib/libm/ef_sqrt.c
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endif
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endif
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LIBM_O = $(addprefix $(BUILD)/, $(LIBM_SRC_C:.c=.o))
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# Too many warnings in libm_dbl, disable for now.
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ifeq ($(MICROPY_FLOAT_IMPL),double)
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$(LIBM_O): CFLAGS := $(filter-out -Wdouble-promotion -Wfloat-conversion, $(CFLAGS))
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endif
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DRIVERS_SRC_C += $(addprefix drivers/,\
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bus/softspi.c \
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bus/softqspi.c \
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memory/spiflash.c \
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dht/dht.c \
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)
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SRC_C += \
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boardctrl.c \
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main.c \
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ra_it.c \
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mphalport.c \
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mpthreadport.c \
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irq.c \
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pendsv.c \
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systick.c \
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powerctrl.c \
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powerctrlboot.c \
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pybthread.c \
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factoryreset.c \
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timer.c \
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led.c \
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uart.c \
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gccollect.c \
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help.c \
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machine_adc.c \
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machine_i2c.c \
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machine_spi.c \
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machine_uart.c \
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machine_pin.c \
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machine_rtc.c \
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modmachine.c \
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extint.c \
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usrsw.c \
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flash.c \
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flashbdev.c \
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storage.c \
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fatfs_port.c \
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$(BOARD_DIR)/src/hal_entry.c \
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$(wildcard $(BOARD_DIR)/*.c)
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SRC_C += $(addprefix $(BOARD_DIR)/ra_gen/,\
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common_data.c \
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hal_data.c \
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main.c \
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pin_data.c \
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vector_data.c \
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)
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SRC_O += \
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$(STARTUP_FILE) \
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$(SYSTEM_FILE)
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SRC_O += \
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shared/runtime/gchelper_thumb2.o
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HAL_SRC_C += $(addprefix $(HAL_DIR)/ra/fsp/src/bsp/mcu/all/,\
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bsp_clocks.c \
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bsp_common.c \
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bsp_delay.c \
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bsp_group_irq.c \
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bsp_guard.c \
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bsp_io.c \
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bsp_irq.c \
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bsp_register_protection.c \
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bsp_rom_registers.c \
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bsp_sbrk.c \
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bsp_security.c \
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)
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HAL_SRC_C += $(addprefix $(HAL_DIR)/ra/fsp/src/,\
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r_ioport/r_ioport.c \
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)
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ifeq ($(USE_FSP_LPM), 1)
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CFLAGS += -DUSE_FSP_LPM
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HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_lpm/r_lpm.c
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endif
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ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA4M1 RA4W1))
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ifeq ($(USE_FSP_FLASH), 1)
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CFLAGS += -DUSE_FSP_FLASH
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HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_flash_lp/r_flash_lp.c
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endif
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endif
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ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA6M1 RA6M2))
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ifeq ($(USE_FSP_FLASH), 1)
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CFLAGS += -DUSE_FSP_FLASH
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HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_flash_hp/r_flash_hp.c
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endif
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endif
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ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA4M1 RA4W1 RA6M1 RA6M2))
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HAL_SRC_C += $(addprefix ra/,\
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ra_adc.c \
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ra_flash.c \
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ra_gpio.c \
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ra_i2c.c \
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ra_icu.c \
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ra_init.c \
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ra_int.c \
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ra_rtc.c \
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ra_sci.c \
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ra_spi.c \
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ra_timer.c \
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ra_utils.c \
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)
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endif
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OBJ += $(PY_O)
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OBJ += $(addprefix $(BUILD)/, $(LIB_SRC_C:.c=.o))
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OBJ += $(LIBM_O)
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OBJ += $(addprefix $(BUILD)/, $(SHARED_SRC_C:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(HAL_SRC_C:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_CXX:.cpp=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_O))
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OBJ += $(BUILD)/pins_$(BOARD).o
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# This file contains performance critical functions so turn up the optimisation
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# level. It doesn't add much to the code size and improves performance a bit.
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# Don't use -O3 with this file because gcc tries to optimise memset in terms of itself.
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$(BUILD)/shared/libc/string0.o: COPT += -O2
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# We put several files into the first 16K section with the ISRs.
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# If we compile these using -O0 then it won't fit. So if you really want these
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# to be compiled with -O0, then edit boards/common.ld (in the .isr_vector section)
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# and comment out the following lines.
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$(BUILD)/$(OOFATFS_DIR)/ff.o: COPT += -Os
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$(filter $(PY_BUILD)/../extmod/vfs_fat_%.o, $(PY_O)): COPT += -Os
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$(PY_BUILD)/formatfloat.o: COPT += -Os
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$(PY_BUILD)/parsenum.o: COPT += -Os
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$(PY_BUILD)/mpprint.o: COPT += -Os
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all: $(TOP)/lib/fsp/README.md $(BUILD)/firmware.hex
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# For convenience, automatically fetch required submodules if they don't exist
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$(TOP)/lib/fsp/README.md:
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$(ECHO) "fsp submodule not found, fetching it now..."
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(cd $(TOP) && git submodule update --init lib/fsp)
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ifneq ($(FROZEN_MANIFEST)$(FROZEN_DIR),)
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# To use frozen source modules, put your .py files in a subdirectory (eg scripts/)
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# and then invoke make with FROZEN_DIR=scripts (be sure to build from scratch).
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CFLAGS += -DMICROPY_MODULE_FROZEN_STR
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endif
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ifneq ($(FROZEN_MANIFEST)$(FROZEN_MPY_DIR),)
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# To use frozen bytecode, put your .py files in a subdirectory (eg frozen/) and
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# then invoke make with FROZEN_MPY_DIR=frozen (be sure to build from scratch).
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CFLAGS += -DMICROPY_QSTR_EXTRA_POOL=mp_qstr_frozen_const_pool
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CFLAGS += -DMICROPY_MODULE_FROZEN_MPY
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endif
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define GENERATE_ELF
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$(ECHO) "LINK $(1)"
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$(Q)$(LD) $(LDFLAGS) -o $(1) $(2) $(LDFLAGS_MOD) $(LIBS)
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$(Q)$(SIZE) $(1)
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endef
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define GENERATE_BIN
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$(ECHO) "GEN $(1)"
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$(Q)$(OBJCOPY) -O binary $(addprefix -j ,$(3)) $(2) $(1)
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endef
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define GENERATE_HEX
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$(ECHO) "GEN $(1)"
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$(Q)$(OBJCOPY) -O ihex $(2) $(1)
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endef
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.PHONY:
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# A board should specify TEXT0_ADDR if to use a different location than the
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# default for the firmware memory location. A board can also optionally define
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# TEXT1_ADDR to split the firmware into two sections; see below for details.
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TEXT0_ADDR ?= 0x00000000
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# No TEXT1_ADDR given so put all firmware at TEXT0_ADDR location
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TEXT0_SECTIONS ?= .isr_vector .text .data
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$(BUILD)/firmware.bin: $(BUILD)/firmware.elf
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$(call GENERATE_BIN,$@,$^,$(TEXT0_SECTIONS))
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$(BUILD)/firmware.hex: $(BUILD)/firmware.elf
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$(call GENERATE_HEX,$@,$^)
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$(BUILD)/firmware.elf: $(OBJ)
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$(call GENERATE_ELF,$@,$^)
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MAKE_PINS = boards/make-pins.py
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BOARD_PINS = $(BOARD_DIR)/pins.csv
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PREFIX_FILE = boards/ra_pin_prefix.c
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ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA4M1))
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AF_FILE = boards/ra4m1_af.csv
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endif
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ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA4W1))
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AF_FILE = boards/ra4w1_af.csv
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|
endif
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ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA6M1))
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|
AF_FILE = boards/ra6m1_af.csv
|
|
endif
|
|
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA6M2))
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|
AF_FILE = boards/ra6m2_af.csv
|
|
endif
|
|
GEN_PINS_SRC = $(BUILD)/pins_$(BOARD).c
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|
GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
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|
GEN_PINS_QSTR = $(BUILD)/pins_qstr.h
|
|
GEN_PINS_AD_CONST = $(HEADER_BUILD)/pins_ad_const.h
|
|
GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h
|
|
#GEN_PINS_AF_DEFS = $(HEADER_BUILD)/pins_af_defs.h
|
|
GEN_PINS_AF_PY = $(BUILD)/pins_af.py
|
|
|
|
FILE2H = $(TOP)/tools/file2h.py
|
|
|
|
# List of sources for qstr extraction
|
|
SRC_QSTR += $(SRC_C) $(SRC_CXX) $(SHARED_SRC_C)
|
|
|
|
# Making OBJ use an order-only depenedency on the generated pins.h file
|
|
# has the side effect of making the pins.h file before we actually compile
|
|
# any of the objects. The normal dependency generation will deal with the
|
|
# case when pins.h is modified. But when it doesn't exist, we don't know
|
|
# which source files might need it.
|
|
$(OBJ): | $(GEN_PINS_HDR)
|
|
|
|
# With conditional pins, we may need to regenerate qstrdefs.h when config
|
|
# options change.
|
|
$(HEADER_BUILD)/qstrdefs.generated.h: $(BOARD_DIR)/mpconfigboard.h
|
|
|
|
# Use a pattern rule here so that make will only call make-pins.py once to make
|
|
# both pins_$(BOARD).c and pins.h
|
|
.PRECIOUS: $(GEN_PINS_SRC)
|
|
$(BUILD)/%_$(BOARD).c $(HEADER_BUILD)/%.h $(HEADER_BUILD)/%_af_const.h $(HEADER_BUILD)/%_af_defs.h $(BUILD)/%_qstr.h: $(BOARD_DIR)/%.csv $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
|
|
$(ECHO) "GEN $@"
|
|
$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE) --prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) --qstr $(GEN_PINS_QSTR) --ad-const $(GEN_PINS_AD_CONST) --af-const $(GEN_PINS_AF_CONST) --af-py $(GEN_PINS_AF_PY) > $(GEN_PINS_SRC)
|
|
|
|
#$(BUILD)/pins_$(BOARD).o: $(BUILD)/pins_$(BOARD).c
|
|
# $(call compile_c)
|
|
|
|
CMSIS_MCU_HDR = $(CMSIS_DIR)/$(CMSIS_MCU_LOWER).h
|
|
|
|
include $(TOP)/py/mkrules.mk
|