104 lines
3.9 KiB
C
104 lines
3.9 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2015 Damien P. George
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#ifndef MICROPY_INCLUDED_STM32_DMA_H
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#define MICROPY_INCLUDED_STM32_DMA_H
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typedef struct _dma_descr_t dma_descr_t;
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#if defined(STM32F4) || defined(STM32F7) || defined(STM32H7)
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extern const dma_descr_t dma_I2C_1_RX;
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extern const dma_descr_t dma_SPI_3_RX;
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extern const dma_descr_t dma_I2C_4_RX;
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extern const dma_descr_t dma_I2C_3_RX;
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extern const dma_descr_t dma_I2C_2_RX;
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extern const dma_descr_t dma_SPI_2_RX;
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extern const dma_descr_t dma_SPI_2_TX;
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extern const dma_descr_t dma_I2C_3_TX;
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extern const dma_descr_t dma_I2C_4_TX;
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extern const dma_descr_t dma_DAC_1_TX;
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extern const dma_descr_t dma_DAC_2_TX;
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extern const dma_descr_t dma_SPI_3_TX;
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extern const dma_descr_t dma_I2C_1_TX;
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extern const dma_descr_t dma_I2C_2_TX;
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extern const dma_descr_t dma_SDMMC_2_RX;
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extern const dma_descr_t dma_SPI_1_RX;
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extern const dma_descr_t dma_SPI_5_RX;
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extern const dma_descr_t dma_SDIO_0_RX;
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extern const dma_descr_t dma_SPI_4_RX;
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extern const dma_descr_t dma_SPI_5_TX;
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extern const dma_descr_t dma_SPI_4_TX;
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extern const dma_descr_t dma_SPI_6_TX;
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extern const dma_descr_t dma_SPI_1_TX;
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extern const dma_descr_t dma_SDMMC_2_TX;
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extern const dma_descr_t dma_SPI_6_RX;
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extern const dma_descr_t dma_SDIO_0_TX;
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#elif defined(STM32L4)
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extern const dma_descr_t dma_ADC_1_RX;
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extern const dma_descr_t dma_ADC_2_RX;
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extern const dma_descr_t dma_SPI_1_RX;
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extern const dma_descr_t dma_I2C_3_TX;
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extern const dma_descr_t dma_ADC_3_RX;
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extern const dma_descr_t dma_SPI_1_TX;
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extern const dma_descr_t dma_I2C_3_RX;
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extern const dma_descr_t dma_DAC_1_TX;
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extern const dma_descr_t dma_SPI_2_RX;
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extern const dma_descr_t dma_I2C_2_TX;
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extern const dma_descr_t dma_DAC_2_TX;
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extern const dma_descr_t dma_SPI_2_TX;
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extern const dma_descr_t dma_I2C_2_RX;
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extern const dma_descr_t dma_I2C_1_TX;
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extern const dma_descr_t dma_I2C_1_RX;
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extern const dma_descr_t dma_SPI_3_RX;
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extern const dma_descr_t dma_SPI_3_TX;
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extern const dma_descr_t dma_SDIO_0_TX;
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extern const dma_descr_t dma_SDIO_0_RX;
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#endif
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typedef union {
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uint16_t enabled; // Used to test if both counters are == 0
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uint8_t counter[2];
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} dma_idle_count_t;
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extern volatile dma_idle_count_t dma_idle;
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#define DMA_IDLE_ENABLED() (dma_idle.enabled != 0)
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#define DMA_SYSTICK_MASK 0x0e
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#define DMA_MSECS_PER_SYSTICK (DMA_SYSTICK_MASK + 1)
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#define DMA_IDLE_TICK_MAX (8) // 128 msec
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#define DMA_IDLE_TICK(tick) (((tick) & DMA_SYSTICK_MASK) == 0)
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void dma_init(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, void *data);
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void dma_init_handle(DMA_HandleTypeDef *dma, const dma_descr_t *dma_descr, void *data);
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void dma_deinit(const dma_descr_t *dma_descr);
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void dma_invalidate_channel(const dma_descr_t *dma_descr);
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void dma_idle_handler(int controller);
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#endif // MICROPY_INCLUDED_STM32_DMA_H
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