119 lines
4.1 KiB
C
119 lines
4.1 KiB
C
/*
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* This file is part of the MicroPython project, http://micropython.org/
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*
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* This file initialises the USB (tinyUSB) and USART (SERCOM). Board USART settings
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* are set in 'boards/<board>/mpconfigboard.h.
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*
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* IMPORTANT: Please refer to "I/O Multiplexing and Considerations" chapters
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* in device datasheets for I/O Pin functions and assignments.
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*
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* The MIT License (MIT)
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*
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* Copyright (c) 2019 Damien P. George
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* Copyright (c) 2022 Robert Hammelrath
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "py/runtime.h"
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#include "modmachine.h"
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#include "samd_soc.h"
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#include "sam.h"
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#include "tusb.h"
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#include "mphalport.h"
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static void usb_init(void) {
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// Init USB clock
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#if defined(MCU_SAMD21)
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GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_ID_USB;
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PM->AHBMASK.bit.USB_ = 1;
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PM->APBBMASK.bit.USB_ = 1;
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uint8_t alt = 6; // alt G, USB
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#elif defined(MCU_SAMD51)
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GCLK->PCHCTRL[USB_GCLK_ID].reg = GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN_GCLK2;
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while (GCLK->PCHCTRL[USB_GCLK_ID].bit.CHEN == 0) {
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}
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MCLK->AHBMASK.bit.USB_ = 1;
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MCLK->APBBMASK.bit.USB_ = 1;
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uint8_t alt = 7; // alt H, USB
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#endif
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// Init USB pins
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PORT->Group[0].DIRSET.reg = 1 << 25 | 1 << 24;
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PORT->Group[0].OUTCLR.reg = 1 << 25 | 1 << 24;
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PORT->Group[0].PMUX[12].reg = alt << 4 | alt;
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PORT->Group[0].PINCFG[24].reg = PORT_PINCFG_PMUXEN;
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PORT->Group[0].PINCFG[25].reg = PORT_PINCFG_PMUXEN;
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tusb_init();
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}
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// Initialize the microsecond counter on TC 0/1
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void init_us_counter(void) {
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#if defined(MCU_SAMD21)
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PM->APBCMASK.bit.TC3_ = 1; // Enable TC3 clock
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PM->APBCMASK.bit.TC4_ = 1; // Enable TC4 clock
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// Select multiplexer generic clock source and enable.
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GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN | GCLK_CLKCTRL_GEN_GCLK3 | GCLK_CLKCTRL_ID_TC4_TC5;
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// Wait while it updates synchronously.
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while (GCLK->STATUS.bit.SYNCBUSY) {
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}
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// configure the timer
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TC4->COUNT32.CTRLA.bit.MODE = TC_CTRLA_MODE_COUNT32_Val;
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TC4->COUNT32.CTRLA.bit.RUNSTDBY = 1;
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TC4->COUNT32.CTRLA.bit.ENABLE = 1;
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while (TC4->COUNT32.STATUS.bit.SYNCBUSY) {
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}
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TC4->COUNT32.READREQ.reg = TC_READREQ_RREQ | TC_READREQ_RCONT | 0x10;
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while (TC4->COUNT32.STATUS.bit.SYNCBUSY) {
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}
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#elif defined(MCU_SAMD51)
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MCLK->APBAMASK.bit.TC0_ = 1; // Enable TC0 clock
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MCLK->APBAMASK.bit.TC1_ = 1; // Enable TC1 clock
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// Peripheral channel 9 is driven by GCLK3, 8 MHz.
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GCLK->PCHCTRL[TC0_GCLK_ID].reg = GCLK_PCHCTRL_GEN_GCLK3 | GCLK_PCHCTRL_CHEN;
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while (GCLK->PCHCTRL[TC0_GCLK_ID].bit.CHEN == 0) {
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}
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// configure the timer
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TC0->COUNT32.CTRLA.bit.PRESCALER = 0;
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TC0->COUNT32.CTRLA.bit.MODE = TC_CTRLA_MODE_COUNT32_Val;
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TC0->COUNT32.CTRLA.bit.RUNSTDBY = 1;
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TC0->COUNT32.CTRLA.bit.ENABLE = 1;
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while (TC0->COUNT32.SYNCBUSY.bit.ENABLE) {
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}
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#endif
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}
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void samd_init(void) {
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init_clocks(get_cpu_freq());
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SysTick_Config(get_cpu_freq() / 1000);
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init_us_counter();
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usb_init();
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check_usb_recovery_mode();
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#if defined(MCU_SAMD51)
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mp_hal_ticks_cpu_enable();
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#endif
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}
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