248 lines
7.7 KiB
C
248 lines
7.7 KiB
C
//*****************************************************************************
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//
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//! \file w5500.c
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//! \brief W5500 HAL Interface.
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//! \version 1.0.1
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//! \date 2013/10/21
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//! \par Revision history
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//! <2014/05/01> V1.0.2
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//! 1. Implicit type casting -> Explicit type casting. Refer to M20140501
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//! Fixed the problem on porting into under 32bit MCU
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//! Issued by Mathias ClauBen, wizwiki forum ID Think01 and bobh
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//! Thank for your interesting and serious advices.
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//! <2013/10/21> 1st Release
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//! <2013/12/20> V1.0.1
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//! 1. Remove warning
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//! 2. WIZCHIP_READ_BUF WIZCHIP_WRITE_BUF in case _WIZCHIP_IO_MODE_SPI_FDM_
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//! for loop optimized(removed). refer to M20131220
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//! \author MidnightCow
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//! \copyright
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//!
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//! Copyright (c) 2013, WIZnet Co., LTD.
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//! All rights reserved.
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//!
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//! Redistribution and use in source and binary forms, with or without
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//! modification, are permitted provided that the following conditions
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//! are met:
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//!
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//! * Redistributions of source code must retain the above copyright
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//! notice, this list of conditions and the following disclaimer.
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//! * Redistributions in binary form must reproduce the above copyright
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//! notice, this list of conditions and the following disclaimer in the
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//! documentation and/or other materials provided with the distribution.
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//! * Neither the name of the <ORGANIZATION> nor the names of its
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//! contributors may be used to endorse or promote products derived
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//! from this software without specific prior written permission.
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//!
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//! THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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//! AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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//! IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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//! ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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//! LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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//! CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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//! SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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//! INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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//! CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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//! ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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//! THE POSSIBILITY OF SUCH DAMAGE.
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//
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//*****************************************************************************
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//#include <stdio.h>
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#include "w5500.h"
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#define _W5500_SPI_VDM_OP_ 0x00
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#define _W5500_SPI_FDM_OP_LEN1_ 0x01
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#define _W5500_SPI_FDM_OP_LEN2_ 0x02
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#define _W5500_SPI_FDM_OP_LEN4_ 0x03
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////////////////////////////////////////////////////
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#define LPC_SSP0 (0)
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static void Chip_SSP_ReadFrames_Blocking(int dummy, uint8_t *buf, uint32_t len) {
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WIZCHIP.IF.SPI._read_bytes(buf, len);
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}
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static void Chip_SSP_WriteFrames_Blocking(int dummy, const uint8_t *buf, uint32_t len) {
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WIZCHIP.IF.SPI._write_bytes(buf, len);
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}
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uint8_t WIZCHIP_READ(uint32_t AddrSel)
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{
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uint8_t ret;
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uint8_t spi_data[3];
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WIZCHIP_CRITICAL_ENTER();
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WIZCHIP.CS._select();
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AddrSel |= (_W5500_SPI_READ_ | _W5500_SPI_VDM_OP_);
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//WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF0000) >> 16);
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//WIZCHIP.IF.SPI._write_byte((AddrSel & 0x0000FF00) >> 8);
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//WIZCHIP.IF.SPI._write_byte((AddrSel & 0x000000FF) >> 0);
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//ret = WIZCHIP.IF.SPI._read_byte();
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spi_data[0] = (AddrSel & 0x00FF0000) >> 16;
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spi_data[1] = (AddrSel & 0x0000FF00) >> 8;
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spi_data[2] = (AddrSel & 0x000000FF) >> 0;
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Chip_SSP_WriteFrames_Blocking(LPC_SSP0, spi_data, 3);
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Chip_SSP_ReadFrames_Blocking(LPC_SSP0, &ret, 1);
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WIZCHIP.CS._deselect();
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WIZCHIP_CRITICAL_EXIT();
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return ret;
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}
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void WIZCHIP_WRITE(uint32_t AddrSel, uint8_t wb )
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{
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uint8_t spi_data[4];
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WIZCHIP_CRITICAL_ENTER();
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WIZCHIP.CS._select();
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AddrSel |= (_W5500_SPI_WRITE_ | _W5500_SPI_VDM_OP_);
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//WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF0000) >> 16);
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//WIZCHIP.IF.SPI._write_byte((AddrSel & 0x0000FF00) >> 8);
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//WIZCHIP.IF.SPI._write_byte((AddrSel & 0x000000FF) >> 0);
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//WIZCHIP.IF.SPI._write_byte(wb);
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spi_data[0] = (AddrSel & 0x00FF0000) >> 16;
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spi_data[1] = (AddrSel & 0x0000FF00) >> 8;
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spi_data[2] = (AddrSel & 0x000000FF) >> 0;
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spi_data[3] = wb;
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Chip_SSP_WriteFrames_Blocking(LPC_SSP0, spi_data, 4);
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WIZCHIP.CS._deselect();
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WIZCHIP_CRITICAL_EXIT();
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}
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void WIZCHIP_READ_BUF (uint32_t AddrSel, uint8_t* pBuf, uint16_t len)
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{
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uint8_t spi_data[3];
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//uint16_t i;
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WIZCHIP_CRITICAL_ENTER();
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WIZCHIP.CS._select();
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AddrSel |= (_W5500_SPI_READ_ | _W5500_SPI_VDM_OP_);
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//WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF0000) >> 16);
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//WIZCHIP.IF.SPI._write_byte((AddrSel & 0x0000FF00) >> 8);
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//WIZCHIP.IF.SPI._write_byte((AddrSel & 0x000000FF) >> 0);
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//for(i = 0; i < len; i++)
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// pBuf[i] = WIZCHIP.IF.SPI._read_byte();
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spi_data[0] = (AddrSel & 0x00FF0000) >> 16;
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spi_data[1] = (AddrSel & 0x0000FF00) >> 8;
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spi_data[2] = (AddrSel & 0x000000FF) >> 0;
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Chip_SSP_WriteFrames_Blocking(LPC_SSP0, spi_data, 3);
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Chip_SSP_ReadFrames_Blocking(LPC_SSP0, pBuf, len);
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WIZCHIP.CS._deselect();
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WIZCHIP_CRITICAL_EXIT();
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}
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void WIZCHIP_WRITE_BUF(uint32_t AddrSel, uint8_t* pBuf, uint16_t len)
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{
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uint8_t spi_data[3];
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//uint16_t i;
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WIZCHIP_CRITICAL_ENTER();
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WIZCHIP.CS._select();
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AddrSel |= (_W5500_SPI_WRITE_ | _W5500_SPI_VDM_OP_);
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//WIZCHIP.IF.SPI._write_byte((AddrSel & 0x00FF0000) >> 16);
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//WIZCHIP.IF.SPI._write_byte((AddrSel & 0x0000FF00) >> 8);
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//WIZCHIP.IF.SPI._write_byte((AddrSel & 0x000000FF) >> 0);
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//for(i = 0; i < len; i++)
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// WIZCHIP.IF.SPI._write_byte(pBuf[i]);
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spi_data[0] = (AddrSel & 0x00FF0000) >> 16;
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spi_data[1] = (AddrSel & 0x0000FF00) >> 8;
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spi_data[2] = (AddrSel & 0x000000FF) >> 0;
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Chip_SSP_WriteFrames_Blocking(LPC_SSP0, spi_data, 3);
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Chip_SSP_WriteFrames_Blocking(LPC_SSP0, pBuf, len);
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WIZCHIP.CS._deselect();
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WIZCHIP_CRITICAL_EXIT();
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}
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uint16_t getSn_TX_FSR(uint8_t sn)
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{
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uint16_t val=0,val1=0;
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do
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{
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val1 = WIZCHIP_READ(Sn_TX_FSR(sn));
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val1 = (val1 << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_TX_FSR(sn),1));
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if (val1 != 0)
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{
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val = WIZCHIP_READ(Sn_TX_FSR(sn));
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val = (val << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_TX_FSR(sn),1));
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}
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}while (val != val1);
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return val;
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}
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uint16_t getSn_RX_RSR(uint8_t sn)
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{
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uint16_t val=0,val1=0;
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do
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{
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val1 = WIZCHIP_READ(Sn_RX_RSR(sn));
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val1 = (val1 << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_RX_RSR(sn),1));
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if (val1 != 0)
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{
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val = WIZCHIP_READ(Sn_RX_RSR(sn));
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val = (val << 8) + WIZCHIP_READ(WIZCHIP_OFFSET_INC(Sn_RX_RSR(sn),1));
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}
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}while (val != val1);
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return val;
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}
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void wiz_send_data(uint8_t sn, uint8_t *wizdata, uint16_t len)
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{
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uint16_t ptr = 0;
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uint32_t addrsel = 0;
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if(len == 0) return;
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ptr = getSn_TX_WR(sn);
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//M20140501 : implict type casting -> explict type casting
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//addrsel = (ptr << 8) + (WIZCHIP_TXBUF_BLOCK(sn) << 3);
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addrsel = ((uint32_t)ptr << 8) + (WIZCHIP_TXBUF_BLOCK(sn) << 3);
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//
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WIZCHIP_WRITE_BUF(addrsel,wizdata, len);
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ptr += len;
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setSn_TX_WR(sn,ptr);
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}
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void wiz_recv_data(uint8_t sn, uint8_t *wizdata, uint16_t len)
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{
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uint16_t ptr = 0;
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uint32_t addrsel = 0;
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if(len == 0) return;
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ptr = getSn_RX_RD(sn);
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//M20140501 : implict type casting -> explict type casting
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//addrsel = ((ptr << 8) + (WIZCHIP_RXBUF_BLOCK(sn) << 3);
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addrsel = ((uint32_t)ptr << 8) + (WIZCHIP_RXBUF_BLOCK(sn) << 3);
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//
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WIZCHIP_READ_BUF(addrsel, wizdata, len);
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ptr += len;
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setSn_RX_RD(sn,ptr);
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}
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void wiz_recv_ignore(uint8_t sn, uint16_t len)
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{
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uint16_t ptr = 0;
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ptr = getSn_RX_RD(sn);
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ptr += len;
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setSn_RX_RD(sn,ptr);
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}
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