2021-02-03 14:20:31 +00:00
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/******************************************************************************
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rv3028.cpp
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Based on RV-3028-C7 Arduino Library by Constantin Koch, July 25, 2019
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https://github.com/constiko/RV-3028_C7-Arduino_Library
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This code is released under the [MIT License](http://opensource.org/licenses/MIT).
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Please review the LICENSE file included with this example.
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Distributed as-is; no warranty is given.
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******************************************************************************/
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#include "rv3028.hpp"
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//****************************************************************************//
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//
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// Settings and configuration
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//
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//****************************************************************************//
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// Parse the __DATE__ predefined macro to generate date defaults:
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// __Date__ Format: MMM DD YYYY (First D may be a space if <10)
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// <MONTH>
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#define BUILD_MONTH_JAN ((__DATE__[0] == 'J') && (__DATE__[1] == 'a')) ? 1 : 0
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#define BUILD_MONTH_FEB (__DATE__[0] == 'F') ? 2 : 0
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#define BUILD_MONTH_MAR ((__DATE__[0] == 'M') && (__DATE__[1] == 'a') && (__DATE__[2] == 'r')) ? 3 : 0
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#define BUILD_MONTH_APR ((__DATE__[0] == 'A') && (__DATE__[1] == 'p')) ? 4 : 0
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#define BUILD_MONTH_MAY ((__DATE__[0] == 'M') && (__DATE__[1] == 'a') && (__DATE__[2] == 'y')) ? 5 : 0
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#define BUILD_MONTH_JUN ((__DATE__[0] == 'J') && (__DATE__[1] == 'u') && (__DATE__[2] == 'n')) ? 6 : 0
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#define BUILD_MONTH_JUL ((__DATE__[0] == 'J') && (__DATE__[1] == 'u') && (__DATE__[2] == 'l')) ? 7 : 0
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#define BUILD_MONTH_AUG ((__DATE__[0] == 'A') && (__DATE__[1] == 'u')) ? 8 : 0
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#define BUILD_MONTH_SEP (__DATE__[0] == 'S') ? 9 : 0
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#define BUILD_MONTH_OCT (__DATE__[0] == 'O') ? 10 : 0
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#define BUILD_MONTH_NOV (__DATE__[0] == 'N') ? 11 : 0
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#define BUILD_MONTH_DEC (__DATE__[0] == 'D') ? 12 : 0
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#define BUILD_MONTH BUILD_MONTH_JAN | BUILD_MONTH_FEB | BUILD_MONTH_MAR | \
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BUILD_MONTH_APR | BUILD_MONTH_MAY | BUILD_MONTH_JUN | \
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BUILD_MONTH_JUL | BUILD_MONTH_AUG | BUILD_MONTH_SEP | \
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BUILD_MONTH_OCT | BUILD_MONTH_NOV | BUILD_MONTH_DEC
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// <DATE>
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#define BUILD_DATE_0 ((__DATE__[4] == ' ') ? 0 : (__DATE__[4] - 0x30))
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#define BUILD_DATE_1 (__DATE__[5] - 0x30)
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#define BUILD_DATE ((BUILD_DATE_0 * 10) + BUILD_DATE_1)
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// <YEAR>
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#define BUILD_YEAR (((__DATE__[7] - 0x30) * 1000) + ((__DATE__[8] - 0x30) * 100) + \
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((__DATE__[9] - 0x30) * 10) + ((__DATE__[10] - 0x30) * 1))
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// Parse the __TIME__ predefined macro to generate time defaults:
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// __TIME__ Format: HH:MM:SS (First number of each is padded by 0 if <10)
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// <HOUR>
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#define BUILD_HOUR_0 ((__TIME__[0] == ' ') ? 0 : (__TIME__[0] - 0x30))
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#define BUILD_HOUR_1 (__TIME__[1] - 0x30)
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#define BUILD_HOUR ((BUILD_HOUR_0 * 10) + BUILD_HOUR_1)
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// <MINUTE>
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#define BUILD_MINUTE_0 ((__TIME__[3] == ' ') ? 0 : (__TIME__[3] - 0x30))
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#define BUILD_MINUTE_1 (__TIME__[4] - 0x30)
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#define BUILD_MINUTE ((BUILD_MINUTE_0 * 10) + BUILD_MINUTE_1)
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// <SECOND>
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#define BUILD_SECOND_0 ((__TIME__[6] == ' ') ? 0 : (__TIME__[6] - 0x30))
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#define BUILD_SECOND_1 (__TIME__[7] - 0x30)
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#define BUILD_SECOND ((BUILD_SECOND_0 * 10) + BUILD_SECOND_1)
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namespace pimoroni {
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2021-05-10 06:23:34 +01:00
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bool RV3028::init() {
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if(interrupt != PIN_UNUSED) {
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gpio_set_function(interrupt, GPIO_FUNC_SIO);
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gpio_set_dir(interrupt, GPIO_IN);
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gpio_pull_up(interrupt);
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}
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2021-05-10 15:24:35 +01:00
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uint8_t chip_id = 0;
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2021-05-14 18:12:37 +01:00
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i2c->read_bytes(address, RV3028_ID, &chip_id, 1);
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2021-05-10 15:24:35 +01:00
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if(chip_id != (RV3028_CHIP_ID | RV3028_VERSION)) {
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return false;
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}
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2021-05-10 06:23:34 +01:00
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return true;
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2021-02-03 14:20:31 +00:00
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}
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2021-05-10 09:38:51 +01:00
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void RV3028::reset() {
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set_bit(RV3028_CTRL2, CTRL2_RESET);
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}
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i2c_inst_t* RV3028::get_i2c() const {
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2021-05-14 18:12:37 +01:00
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return i2c->get_i2c();
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2021-05-10 09:38:51 +01:00
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}
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int RV3028::get_sda() const {
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2021-05-14 18:12:37 +01:00
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return i2c->get_sda();
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2021-05-10 09:38:51 +01:00
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}
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int RV3028::get_scl() const {
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2021-05-14 18:12:37 +01:00
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return i2c->get_scl();
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2021-05-10 09:38:51 +01:00
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}
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int RV3028::get_int() const {
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return interrupt;
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}
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2021-05-10 06:23:34 +01:00
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bool RV3028::setup(bool set_24Hour, bool disable_TrickleCharge, bool set_LevelSwitchingMode) {
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sleep_ms(1000);
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2021-05-10 06:23:34 +01:00
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if(set_24Hour) {
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set_24_hour();
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sleep_ms(1000);
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}
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if(disable_TrickleCharge) {
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disable_trickle_charge();
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sleep_ms(1000);
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}
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2021-02-03 14:20:31 +00:00
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2021-05-10 06:23:34 +01:00
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return ((set_LevelSwitchingMode ? set_backup_switchover_mode(3) : true) && write_register(RV3028_STATUS, 0x00));
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2021-02-03 14:20:31 +00:00
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}
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2021-05-10 06:23:34 +01:00
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bool RV3028::set_time(uint8_t sec, uint8_t min, uint8_t hour, uint8_t weekday, uint8_t date, uint8_t month, uint16_t year) {
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times[TIME_SECONDS] = dec_to_bcd(sec);
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times[TIME_MINUTES] = dec_to_bcd(min);
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times[TIME_HOURS] = dec_to_bcd(hour);
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times[TIME_WEEKDAY] = dec_to_bcd(weekday);
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times[TIME_DATE] = dec_to_bcd(date);
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times[TIME_MONTH] = dec_to_bcd(month);
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times[TIME_YEAR] = dec_to_bcd(year - 2000);
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2021-02-03 14:20:31 +00:00
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bool status = false;
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2021-05-10 06:23:34 +01:00
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if(is_12_hour()) {
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set_24_hour();
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status = set_time(times, TIME_ARRAY_LENGTH);
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set_12_hour();
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}
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else {
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status = set_time(times, TIME_ARRAY_LENGTH);
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2021-02-03 14:20:31 +00:00
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}
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return status;
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}
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// setTime -- Set time and date/day registers of RV3028 (using data array)
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2021-05-10 06:23:34 +01:00
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bool RV3028::set_time(uint8_t * time, uint8_t len) {
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if(len != TIME_ARRAY_LENGTH)
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2021-02-03 14:20:31 +00:00
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return false;
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2021-05-10 06:23:34 +01:00
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return write_multiple_registers(RV3028_SECONDS, time, len);
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2021-02-03 14:20:31 +00:00
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}
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2021-05-10 06:23:34 +01:00
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bool RV3028::set_seconds(uint8_t value) {
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times[TIME_SECONDS] = dec_to_bcd(value);
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return set_time(times, TIME_ARRAY_LENGTH);
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2021-02-03 14:20:31 +00:00
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}
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2021-05-10 06:23:34 +01:00
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bool RV3028::set_minutes(uint8_t value) {
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times[TIME_MINUTES] = dec_to_bcd(value);
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return set_time(times, TIME_ARRAY_LENGTH);
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2021-02-03 14:20:31 +00:00
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}
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2021-05-10 06:23:34 +01:00
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bool RV3028::set_hours(uint8_t value) {
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times[TIME_HOURS] = dec_to_bcd(value);
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return set_time(times, TIME_ARRAY_LENGTH);
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2021-02-03 14:20:31 +00:00
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}
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2021-05-10 06:23:34 +01:00
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bool RV3028::set_weekday(uint8_t value) {
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times[TIME_WEEKDAY] = dec_to_bcd(value);
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return set_time(times, TIME_ARRAY_LENGTH);
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2021-02-03 14:20:31 +00:00
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}
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2021-05-10 06:23:34 +01:00
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bool RV3028::set_date(uint8_t value) {
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times[TIME_DATE] = dec_to_bcd(value);
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return set_time(times, TIME_ARRAY_LENGTH);
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2021-02-03 14:20:31 +00:00
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}
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2021-05-10 06:23:34 +01:00
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bool RV3028::set_month(uint8_t value) {
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times[TIME_MONTH] = dec_to_bcd(value);
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return set_time(times, TIME_ARRAY_LENGTH);
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2021-02-03 14:20:31 +00:00
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}
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2021-05-10 06:23:34 +01:00
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bool RV3028::set_year(uint16_t value) {
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times[TIME_YEAR] = dec_to_bcd(value - 2000);
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return set_time(times, TIME_ARRAY_LENGTH);
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2021-02-03 14:20:31 +00:00
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}
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2021-05-10 15:57:56 +01:00
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// Takes the time from the last build and uses it as the current time
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2021-05-10 06:23:34 +01:00
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bool RV3028::set_to_compiler_time() {
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times[TIME_SECONDS] = dec_to_bcd(BUILD_SECOND);
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times[TIME_MINUTES] = dec_to_bcd(BUILD_MINUTE);
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times[TIME_HOURS] = dec_to_bcd(BUILD_HOUR);
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2021-02-03 14:20:31 +00:00
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2021-05-10 15:57:56 +01:00
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// Build_Hour is 0-23, convert to 1-12 if needed
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2021-05-10 06:23:34 +01:00
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if(is_12_hour()) {
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2021-02-03 14:20:31 +00:00
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uint8_t hour = BUILD_HOUR;
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bool pm = false;
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2021-05-10 06:23:34 +01:00
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if(hour == 0)
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2021-02-03 14:20:31 +00:00
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hour += 12;
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2021-05-10 06:23:34 +01:00
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else if(hour == 12)
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2021-02-03 14:20:31 +00:00
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pm = true;
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2021-05-10 06:23:34 +01:00
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else if(hour > 12) {
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2021-02-03 14:20:31 +00:00
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hour -= 12;
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pm = true;
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}
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2021-05-10 15:57:56 +01:00
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times[TIME_HOURS] = dec_to_bcd(hour); // Load the modified hours
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2021-02-03 14:20:31 +00:00
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2021-05-10 06:23:34 +01:00
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if(pm == true)
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2021-05-10 15:57:56 +01:00
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times[TIME_HOURS] |= (1 << HOURS_AM_PM); // Set AM/PM bit if needed
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2021-02-03 14:20:31 +00:00
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}
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// Calculate weekday (from here: http://stackoverflow.com/a/21235587)
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// 0 = Sunday, 6 = Saturday
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uint16_t d = BUILD_DATE;
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uint16_t m = BUILD_MONTH;
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uint16_t y = BUILD_YEAR;
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uint16_t weekday = (d += m < 3 ? y-- : y - 2, 23 * m / 9 + d + 4 + y / 4 - y / 100 + y / 400) % 7 + 1;
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2021-05-10 06:23:34 +01:00
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times[TIME_WEEKDAY] = dec_to_bcd(weekday);
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2021-05-10 06:23:34 +01:00
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times[TIME_DATE] = dec_to_bcd(BUILD_DATE);
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times[TIME_MONTH] = dec_to_bcd(BUILD_MONTH);
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2021-05-10 15:57:56 +01:00
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times[TIME_YEAR] = dec_to_bcd(BUILD_YEAR - 2000); // ! Not Y2K (or Y2.1K)-proof :(
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2021-05-10 06:23:34 +01:00
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return set_time(times, TIME_ARRAY_LENGTH);
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2021-02-03 14:20:31 +00:00
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}
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2021-05-10 15:57:56 +01:00
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// Move the hours, mins, sec, etc registers from RV-3028-C7 into the _time array
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// Needs to be called before printing time or date
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// We do not protect the GPx registers. They will be overwritten. The user has plenty of RAM if they need it.
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2021-05-10 06:23:34 +01:00
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bool RV3028::update_time() {
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if(read_multiple_registers(RV3028_SECONDS, times, TIME_ARRAY_LENGTH) == false)
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return false; // Something went wrong
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2021-02-03 14:20:31 +00:00
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2021-05-10 06:23:34 +01:00
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if(is_12_hour())
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times[TIME_HOURS] &= ~(1 << HOURS_AM_PM); // Remove this bit from value
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2021-02-03 14:20:31 +00:00
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return true;
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}
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2021-05-10 15:57:56 +01:00
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// Returns a pointer to array of chars that are the date in mm/dd/yyyy format because they're weird
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char* RV3028::string_date_usa() {
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static char date[11 + 3]; // Max of mm/dd/yyyy with \0 terminator (plus extra for worst case conversion)
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sprintf(date, "%02hhu/%02hhu/20%02hhu", bcd_to_dec(times[TIME_MONTH]), bcd_to_dec(times[TIME_DATE]), bcd_to_dec(times[TIME_YEAR]));
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return date;
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2021-02-03 14:20:31 +00:00
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}
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|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Returns a pointer to array of chars that are the date in dd/mm/yyyy format
|
2021-05-10 06:23:34 +01:00
|
|
|
|
char* RV3028::string_date() {
|
2021-05-10 15:57:56 +01:00
|
|
|
|
static char date[11 + 3]; // Max of dd/mm/yyyy with \0 terminator (plus extra for worst case conversion)
|
2021-05-10 06:23:34 +01:00
|
|
|
|
sprintf(date, "%02hhu/%02hhu/20%02hhu", bcd_to_dec(times[TIME_DATE]), bcd_to_dec(times[TIME_MONTH]), bcd_to_dec(times[TIME_YEAR]));
|
|
|
|
|
return date;
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Returns a pointer to array of chars that represents the time in hh:mm:ss format
|
|
|
|
|
// Adds AM/PM if in 12 hour mode
|
2021-05-10 06:23:34 +01:00
|
|
|
|
char* RV3028::string_time() {
|
2021-05-10 15:57:56 +01:00
|
|
|
|
static char time[11 + 3]; // Max of hh:mm:ssXM with \0 terminator (plus extra for worst case conversion)
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
if(is_12_hour() == true) {
|
2021-02-03 14:20:31 +00:00
|
|
|
|
char half = 'A';
|
2021-05-10 06:23:34 +01:00
|
|
|
|
if(is_pm()) half = 'P';
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
sprintf(time, "%02hhu:%02hhu:%02hhu%cM", bcd_to_dec(times[TIME_HOURS]), bcd_to_dec(times[TIME_MINUTES]), bcd_to_dec(times[TIME_SECONDS]), half);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
else
|
2021-05-10 06:23:34 +01:00
|
|
|
|
sprintf(time, "%02hhu:%02hhu:%02hhu", bcd_to_dec(times[TIME_HOURS]), bcd_to_dec(times[TIME_MINUTES]), bcd_to_dec(times[TIME_SECONDS]));
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
return time;
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
char* RV3028::string_time_stamp() {
|
2021-05-10 15:57:56 +01:00
|
|
|
|
static char time_stamp[25 + 4]; // Max of yyyy-mm-ddThh:mm:ss.ss with \0 terminator (plus extra for worst case conversion)
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
if(is_12_hour() == true) {
|
2021-02-03 14:20:31 +00:00
|
|
|
|
char half = 'A';
|
2021-05-10 06:23:34 +01:00
|
|
|
|
if(is_pm()) half = 'P';
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 09:38:51 +01:00
|
|
|
|
sprintf(time_stamp, "20%02hhu-%02hhu-%02hhu %02hhu:%02hhu:%02hhu%cM", bcd_to_dec(times[TIME_YEAR]), bcd_to_dec(times[TIME_MONTH]), bcd_to_dec(times[TIME_DATE]), bcd_to_dec(times[TIME_HOURS]), bcd_to_dec(times[TIME_MINUTES]), bcd_to_dec(times[TIME_SECONDS]), half);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
else
|
2021-05-10 09:38:51 +01:00
|
|
|
|
sprintf(time_stamp, "20%02hhu-%02hhu-%02hhu %02hhu:%02hhu:%02hhu", bcd_to_dec(times[TIME_YEAR]), bcd_to_dec(times[TIME_MONTH]), bcd_to_dec(times[TIME_DATE]), bcd_to_dec(times[TIME_HOURS]), bcd_to_dec(times[TIME_MINUTES]), bcd_to_dec(times[TIME_SECONDS]));
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 09:38:51 +01:00
|
|
|
|
return time_stamp;
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t RV3028::get_seconds() {
|
|
|
|
|
return bcd_to_dec(times[TIME_SECONDS]);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t RV3028::get_minutes() {
|
|
|
|
|
return bcd_to_dec(times[TIME_MINUTES]);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t RV3028::get_hours() {
|
|
|
|
|
return bcd_to_dec(times[TIME_HOURS]);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t RV3028::get_weekday() {
|
|
|
|
|
return bcd_to_dec(times[TIME_WEEKDAY]);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t RV3028::get_date() {
|
|
|
|
|
return bcd_to_dec(times[TIME_DATE]);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t RV3028::get_month() {
|
|
|
|
|
return bcd_to_dec(times[TIME_MONTH]);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint16_t RV3028::get_year() {
|
|
|
|
|
return bcd_to_dec(times[TIME_YEAR]) + 2000;
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Returns true if RTC has been configured for 12 hour mode
|
2021-05-10 06:23:34 +01:00
|
|
|
|
bool RV3028::is_12_hour() {
|
|
|
|
|
uint8_t controlRegister2 = read_register(RV3028_CTRL2);
|
|
|
|
|
return (controlRegister2 & (1 << CTRL2_12_24));
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Returns true if RTC has PM bit set and 12Hour bit set
|
2021-05-10 06:23:34 +01:00
|
|
|
|
bool RV3028::is_pm() {
|
|
|
|
|
uint8_t hourRegister = read_register(RV3028_HOURS);
|
|
|
|
|
if(is_12_hour() && (hourRegister & (1 << HOURS_AM_PM)))
|
|
|
|
|
return true;
|
|
|
|
|
return false;
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Configure RTC to output 1-12 hours
|
|
|
|
|
// Converts any current hour setting to 12 hour
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::set_12_hour() {
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Do we need to change anything?
|
2021-05-10 06:23:34 +01:00
|
|
|
|
if(is_12_hour() == false) {
|
2021-05-10 15:57:56 +01:00
|
|
|
|
uint8_t hour = bcd_to_dec(read_register(RV3028_HOURS)); // Get the current hour in the RTC
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Set the 12/24 hour bit
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t setting = read_register(RV3028_CTRL2);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
setting |= (1 << CTRL2_12_24);
|
2021-05-10 06:23:34 +01:00
|
|
|
|
write_register(RV3028_CTRL2, setting);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Take the current hours and convert to 12, complete with AM/PM bit
|
2021-02-03 14:20:31 +00:00
|
|
|
|
bool pm = false;
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
if(hour == 0)
|
2021-02-03 14:20:31 +00:00
|
|
|
|
hour += 12;
|
2021-05-10 06:23:34 +01:00
|
|
|
|
else if(hour == 12)
|
2021-02-03 14:20:31 +00:00
|
|
|
|
pm = true;
|
2021-05-10 06:23:34 +01:00
|
|
|
|
else if(hour > 12) {
|
2021-02-03 14:20:31 +00:00
|
|
|
|
hour -= 12;
|
|
|
|
|
pm = true;
|
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
hour = dec_to_bcd(hour); // Convert to BCD
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
if(pm == true) hour |= (1 << HOURS_AM_PM); // Set AM/PM bit if needed
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
write_register(RV3028_HOURS, hour); // Record this to hours register
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Configure RTC to output 0-23 hours
|
|
|
|
|
// Converts any current hour setting to 24 hour
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::set_24_hour() {
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Do we need to change anything?
|
2021-05-10 06:23:34 +01:00
|
|
|
|
if(is_12_hour() == true) {
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Not sure what changing the CTRL2 register will do to hour register so let's get a copy
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t hour = read_register(RV3028_HOURS); //Get the current 12 hour formatted time in BCD
|
2021-02-03 14:20:31 +00:00
|
|
|
|
bool pm = false;
|
2021-05-10 15:57:56 +01:00
|
|
|
|
if(hour & (1 << HOURS_AM_PM)) { // Is the AM/PM bit set?
|
2021-02-03 14:20:31 +00:00
|
|
|
|
pm = true;
|
2021-05-10 15:57:56 +01:00
|
|
|
|
hour &= ~(1 << HOURS_AM_PM); // Clear the bit
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Change to 24 hour mode
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t setting = read_register(RV3028_CTRL2);
|
2021-05-10 15:57:56 +01:00
|
|
|
|
setting &= ~(1 << CTRL2_12_24); // Clear the 12/24 hr bit
|
2021-05-10 06:23:34 +01:00
|
|
|
|
write_register(RV3028_CTRL2, setting);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Given a BCD hour in the 1-12 range, make it 24
|
|
|
|
|
hour = bcd_to_dec(hour); // Convert core of register to DEC
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
if(pm == true) hour += 12; // 2PM becomes 14
|
|
|
|
|
if(hour == 12) hour = 0; // 12AM stays 12, but should really be 0
|
|
|
|
|
if(hour == 24) hour = 12; // 12PM becomes 24, but should really be 12
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
hour = dec_to_bcd(hour); // Convert to BCD
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
write_register(RV3028_HOURS, hour); // Record this to hours register
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// ATTENTION: Real Time and UNIX Time are INDEPENDENT!
|
2021-05-10 06:23:34 +01:00
|
|
|
|
bool RV3028::set_unix(uint32_t value) {
|
2021-02-03 14:20:31 +00:00
|
|
|
|
uint8_t unix_reg[4];
|
|
|
|
|
unix_reg[0] = value;
|
|
|
|
|
unix_reg[1] = value >> 8;
|
|
|
|
|
unix_reg[2] = value >> 16;
|
|
|
|
|
unix_reg[3] = value >> 24;
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
return write_multiple_registers(RV3028_UNIX_TIME0, unix_reg, 4);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// ATTENTION: Real Time and UNIX Time are INDEPENDENT!
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint32_t RV3028::get_unix() {
|
2021-02-03 14:20:31 +00:00
|
|
|
|
uint8_t unix_reg[4];
|
2021-05-10 06:23:34 +01:00
|
|
|
|
read_multiple_registers(RV3028_UNIX_TIME0, unix_reg, 4);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
return ((uint32_t)unix_reg[3] << 24) | ((uint32_t)unix_reg[2] << 16) | ((uint32_t)unix_reg[1] << 8) | unix_reg[0];
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*********************************
|
|
|
|
|
Set the alarm mode in the following way:
|
|
|
|
|
0: When minutes, hours and weekday/date match (once per weekday/date)
|
|
|
|
|
1: When hours and weekday/date match (once per weekday/date)
|
|
|
|
|
2: When minutes and weekday/date match (once per hour per weekday/date)
|
|
|
|
|
3: When weekday/date match (once per weekday/date)
|
|
|
|
|
4: When hours and minutes match (once per day)
|
|
|
|
|
5: When hours match (once per day)
|
|
|
|
|
6: When minutes match (once per hour)
|
|
|
|
|
7: All disabled <EFBFBD> Default value
|
|
|
|
|
If you want to set a weekday alarm (setWeekdayAlarm_not_Date = true), set 'date_or_weekday' from 0 (Sunday) to 6 (Saturday)
|
|
|
|
|
********************************/
|
2021-05-10 09:38:51 +01:00
|
|
|
|
void RV3028::enable_alarm_interrupt(uint8_t min, uint8_t hour, uint8_t date_or_weekday, bool set_weekday_alarm_not_date, uint8_t mode, bool enable_clock_output) {
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// disable Alarm Interrupt to prevent accidental interrupts during configuration
|
2021-05-10 06:23:34 +01:00
|
|
|
|
disable_alarm_interrupt();
|
|
|
|
|
clear_alarm_interrupt_flag();
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// ENHANCEMENT: Add Alarm in 12 hour mode
|
2021-05-10 06:23:34 +01:00
|
|
|
|
set_24_hour();
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Set WADA bit (Weekday/Date Alarm)
|
2021-05-10 09:38:51 +01:00
|
|
|
|
if(set_weekday_alarm_not_date)
|
2021-05-10 06:23:34 +01:00
|
|
|
|
clear_bit(RV3028_CTRL1, CTRL1_WADA);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
else
|
2021-05-10 06:23:34 +01:00
|
|
|
|
set_bit(RV3028_CTRL1, CTRL1_WADA);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Write alarm settings in registers 0x07 to 0x09
|
2021-02-03 14:20:31 +00:00
|
|
|
|
uint8_t alarmTime[3];
|
2021-05-10 06:23:34 +01:00
|
|
|
|
alarmTime[0] = dec_to_bcd(min); //minutes
|
|
|
|
|
alarmTime[1] = dec_to_bcd(hour); //hours
|
|
|
|
|
alarmTime[2] = dec_to_bcd(date_or_weekday); //date or weekday
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// shift alarm enable bits
|
2021-05-10 06:23:34 +01:00
|
|
|
|
if(mode > 0b111)
|
2021-05-10 15:57:56 +01:00
|
|
|
|
mode = 0b111; // 0 to 7 is valid
|
2021-05-10 06:23:34 +01:00
|
|
|
|
|
|
|
|
|
if(mode & 0b001)
|
2021-02-03 14:20:31 +00:00
|
|
|
|
alarmTime[0] |= 1 << MINUTESALM_AE_M;
|
2021-05-10 06:23:34 +01:00
|
|
|
|
if(mode & 0b010)
|
2021-02-03 14:20:31 +00:00
|
|
|
|
alarmTime[1] |= 1 << HOURSALM_AE_H;
|
2021-05-10 06:23:34 +01:00
|
|
|
|
if(mode & 0b100)
|
2021-02-03 14:20:31 +00:00
|
|
|
|
alarmTime[2] |= 1 << DATE_AE_WD;
|
2021-05-10 15:57:56 +01:00
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
write_multiple_registers(RV3028_MINUTES_ALM, alarmTime, 3);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
enable_alarm_interrupt();
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Clock output?
|
2021-05-10 06:23:34 +01:00
|
|
|
|
if(enable_clock_output)
|
|
|
|
|
set_bit(RV3028_INT_MASK, IMT_MASK_CAIE);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
else
|
2021-05-10 06:23:34 +01:00
|
|
|
|
clear_bit(RV3028_INT_MASK, IMT_MASK_CAIE);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::enable_alarm_interrupt() {
|
|
|
|
|
set_bit(RV3028_CTRL2, CTRL2_AIE);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Only disables the interrupt (not the alarm flag)
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::disable_alarm_interrupt() {
|
|
|
|
|
clear_bit(RV3028_CTRL2, CTRL2_AIE);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
bool RV3028::read_alarm_interrupt_flag() {
|
|
|
|
|
return read_bit(RV3028_STATUS, STATUS_AF);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::clear_alarm_interrupt_flag() {
|
|
|
|
|
clear_bit(RV3028_STATUS, STATUS_AF);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*********************************
|
|
|
|
|
Countdown Timer Interrupt
|
|
|
|
|
********************************/
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::set_timer(bool timer_repeat, uint16_t timer_frequency, uint16_t timer_value, bool set_interrupt, bool start_timer, bool enable_clock_output) {
|
|
|
|
|
disable_timer();
|
|
|
|
|
disable_timer_interrupt();
|
|
|
|
|
clear_timer_interrupt_flag();
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
write_register(RV3028_TIMERVAL_0, timer_value & 0xff);
|
|
|
|
|
write_register(RV3028_TIMERVAL_1, timer_value >> 8);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t ctrl1_val = read_register(RV3028_CTRL1);
|
|
|
|
|
if(timer_repeat) {
|
2021-02-03 14:20:31 +00:00
|
|
|
|
ctrl1_val |= 1 << CTRL1_TRPT;
|
2021-05-10 09:38:51 +01:00
|
|
|
|
}
|
|
|
|
|
else {
|
2021-02-03 14:20:31 +00:00
|
|
|
|
ctrl1_val &= ~(1 << CTRL1_TRPT);
|
|
|
|
|
}
|
2021-05-10 09:38:51 +01:00
|
|
|
|
|
|
|
|
|
switch(timer_frequency) {
|
2021-05-10 15:57:56 +01:00
|
|
|
|
case 4096: // 4096Hz (default) // up to 122us error on first time
|
2021-02-03 14:20:31 +00:00
|
|
|
|
ctrl1_val &= ~3; // Clear both the bits
|
|
|
|
|
break;
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
case 64: // 64Hz // up to 7.813ms error on first time
|
2021-02-03 14:20:31 +00:00
|
|
|
|
ctrl1_val &= ~3; // Clear both the bits
|
|
|
|
|
ctrl1_val |= 1;
|
|
|
|
|
break;
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
case 1: // 1Hz // up to 7.813ms error on first time
|
2021-02-03 14:20:31 +00:00
|
|
|
|
ctrl1_val &= ~3; // Clear both the bits
|
|
|
|
|
ctrl1_val |= 2;
|
|
|
|
|
break;
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
case 60000: // 1/60Hz // up to 7.813ms error on first time
|
2021-02-03 14:20:31 +00:00
|
|
|
|
ctrl1_val |= 3; // Set both bits
|
|
|
|
|
break;
|
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
if(set_interrupt) {
|
|
|
|
|
enable_timer_interrupt();
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
2021-05-10 06:23:34 +01:00
|
|
|
|
if(start_timer) {
|
2021-02-03 14:20:31 +00:00
|
|
|
|
ctrl1_val |= (1 << CTRL1_TE);
|
|
|
|
|
}
|
2021-05-10 06:23:34 +01:00
|
|
|
|
write_register(RV3028_CTRL1, ctrl1_val);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Clock output?
|
2021-05-10 06:23:34 +01:00
|
|
|
|
if(enable_clock_output)
|
|
|
|
|
set_bit(RV3028_INT_MASK, IMT_MASK_CTIE);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
else
|
2021-05-10 06:23:34 +01:00
|
|
|
|
clear_bit(RV3028_INT_MASK, IMT_MASK_CTIE);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 09:38:51 +01:00
|
|
|
|
uint16_t RV3028::get_timer_count() {
|
2021-02-03 14:20:31 +00:00
|
|
|
|
// Reads the number of remaining timer ticks
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t r0 = read_register(RV3028_TIMERSTAT_0);
|
2021-05-10 09:38:51 +01:00
|
|
|
|
return (r0 + (read_register(RV3028_TIMERSTAT_1) << 8));
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::enable_timer_interrupt() {
|
|
|
|
|
set_bit(RV3028_CTRL2, CTRL2_TIE);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::disable_timer_interrupt() {
|
|
|
|
|
clear_bit(RV3028_CTRL2, CTRL2_TIE);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
bool RV3028::read_timer_interrupt_flag() {
|
|
|
|
|
return read_bit(RV3028_STATUS, STATUS_TF);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::clear_timer_interrupt_flag() {
|
|
|
|
|
clear_bit(RV3028_STATUS, STATUS_TF);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::enable_timer() {
|
|
|
|
|
set_bit(RV3028_CTRL1, CTRL1_TE);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::disable_timer() {
|
|
|
|
|
clear_bit(RV3028_CTRL1, CTRL1_TE);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*********************************
|
|
|
|
|
Periodic Time Update Interrupt
|
|
|
|
|
********************************/
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::enable_periodic_update_interrupt(bool every_second, bool enable_clock_output) {
|
|
|
|
|
disable_periodic_update_interrupt();
|
|
|
|
|
clear_periodic_update_interrupt_flag();
|
|
|
|
|
|
2021-05-10 09:38:51 +01:00
|
|
|
|
if(every_second)
|
2021-05-10 06:23:34 +01:00
|
|
|
|
clear_bit(RV3028_CTRL1, CTRL1_USEL);
|
2021-05-10 09:38:51 +01:00
|
|
|
|
else // every minute
|
2021-05-10 06:23:34 +01:00
|
|
|
|
set_bit(RV3028_CTRL1, CTRL1_USEL);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
set_bit(RV3028_CTRL2, CTRL2_UIE);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Clock output?
|
2021-05-10 06:23:34 +01:00
|
|
|
|
if(enable_clock_output)
|
|
|
|
|
set_bit(RV3028_INT_MASK, IMT_MASK_CUIE);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
else
|
2021-05-10 06:23:34 +01:00
|
|
|
|
clear_bit(RV3028_INT_MASK, IMT_MASK_CUIE);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::disable_periodic_update_interrupt() {
|
|
|
|
|
clear_bit(RV3028_CTRL2, CTRL2_UIE);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
bool RV3028::read_periodic_update_interrupt_flag() {
|
|
|
|
|
return read_bit(RV3028_STATUS, STATUS_UF);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::clear_periodic_update_interrupt_flag() {
|
|
|
|
|
clear_bit(RV3028_STATUS, STATUS_UF);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*********************************
|
|
|
|
|
Enable the Trickle Charger and set the Trickle Charge series resistor (default is 15k)
|
|
|
|
|
TCR_3K = 3kOhm
|
|
|
|
|
TCR_5K = 5kOhm
|
|
|
|
|
TCR_9K = 9kOhm
|
|
|
|
|
TCR_15K = 15kOhm
|
|
|
|
|
*********************************/
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::enable_trickle_charge(uint8_t tcr) {
|
|
|
|
|
if(tcr > 3)
|
|
|
|
|
return;
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Read EEPROM Backup Register (0x37)
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t eeprom_backup = read_config_eeprom_ram_mirror(EEPROM_Backup_Register);
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Set TCR Bits (Trickle Charge Resistor)
|
|
|
|
|
eeprom_backup &= EEPROMBackup_TCR_CLEAR; // Clear TCR Bits
|
|
|
|
|
eeprom_backup |= tcr << EEPROMBackup_TCR_SHIFT; // Shift values into EEPROM Backup Register
|
|
|
|
|
// Write 1 to TCE Bit
|
2021-05-10 06:23:34 +01:00
|
|
|
|
eeprom_backup |= 1 << EEPROMBackup_TCE_BIT;
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Write EEPROM Backup Register
|
2021-05-10 06:23:34 +01:00
|
|
|
|
write_config_eeprom_ram_mirror(EEPROM_Backup_Register, eeprom_backup);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::disable_trickle_charge() {
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Read EEPROM Backup Register (0x37)
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t eeprom_backup = read_config_eeprom_ram_mirror(EEPROM_Backup_Register);
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Write 0 to TCE Bit
|
2021-05-10 06:23:34 +01:00
|
|
|
|
eeprom_backup &= ~(1 << EEPROMBackup_TCE_BIT);
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Write EEPROM Backup Register
|
2021-05-10 06:23:34 +01:00
|
|
|
|
write_config_eeprom_ram_mirror(EEPROM_Backup_Register, eeprom_backup);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*********************************
|
|
|
|
|
0 = Switchover disabled
|
|
|
|
|
1 = Direct Switching Mode
|
|
|
|
|
2 = Standby Mode
|
|
|
|
|
3 = Level Switching Mode
|
|
|
|
|
*********************************/
|
2021-05-10 06:23:34 +01:00
|
|
|
|
bool RV3028::set_backup_switchover_mode(uint8_t val) {
|
|
|
|
|
if(val > 3)
|
|
|
|
|
return false;
|
|
|
|
|
|
2021-02-03 14:20:31 +00:00
|
|
|
|
bool success = true;
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Read EEPROM Backup Register (0x37)
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t eeprom_backup = read_config_eeprom_ram_mirror(EEPROM_Backup_Register);
|
|
|
|
|
if(eeprom_backup == 0xFF)
|
|
|
|
|
success = false;
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Ensure FEDE Bit is set to 1
|
2021-05-10 06:23:34 +01:00
|
|
|
|
eeprom_backup |= 1 << EEPROMBackup_FEDE_BIT;
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Set BSM Bits (Backup Switchover Mode)
|
|
|
|
|
eeprom_backup &= EEPROMBackup_BSM_CLEAR; // Clear BSM Bits of EEPROM Backup Register
|
|
|
|
|
eeprom_backup |= val << EEPROMBackup_BSM_SHIFT; // Shift values into EEPROM Backup Register
|
2021-05-10 06:23:34 +01:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Write EEPROM Backup Register
|
2021-05-10 06:23:34 +01:00
|
|
|
|
if(!write_config_eeprom_ram_mirror(EEPROM_Backup_Register, eeprom_backup))
|
|
|
|
|
success = false;
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
|
|
|
|
return success;
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
/*********************************
|
|
|
|
|
Clock Out functions
|
|
|
|
|
********************************/
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::enable_clock_out(uint8_t freq) {
|
|
|
|
|
if(freq > 7)
|
|
|
|
|
return; // check out of bounds
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Read EEPROM CLKOUT Register (0x35)
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t eeprom_clkout = read_config_eeprom_ram_mirror(EEPROM_Clkout_Register);
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Ensure CLKOE Bit is set to 1
|
2021-05-10 06:23:34 +01:00
|
|
|
|
eeprom_clkout |= 1 << EEPROMClkout_CLKOE_BIT;
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Shift values into EEPROM Backup Register
|
2021-05-10 06:23:34 +01:00
|
|
|
|
eeprom_clkout |= freq << EEPROMClkout_FREQ_SHIFT;
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Write EEPROM Backup Register
|
2021-05-10 06:23:34 +01:00
|
|
|
|
write_config_eeprom_ram_mirror(EEPROM_Clkout_Register, eeprom_clkout);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::enable_interrupt_controlled_clockout(uint8_t freq) {
|
|
|
|
|
if(freq > 7)
|
|
|
|
|
return; // check out of bounds
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Read EEPROM CLKOUT Register (0x35)
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t eeprom_clkout = read_config_eeprom_ram_mirror(EEPROM_Clkout_Register);
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Shift values into EEPROM Backup Register
|
2021-05-10 06:23:34 +01:00
|
|
|
|
eeprom_clkout |= freq << EEPROMClkout_FREQ_SHIFT;
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Write EEPROM Backup Register
|
2021-05-10 06:23:34 +01:00
|
|
|
|
write_config_eeprom_ram_mirror(EEPROM_Clkout_Register, eeprom_clkout);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Set CLKIE Bit
|
2021-05-10 06:23:34 +01:00
|
|
|
|
set_bit(RV3028_CTRL2, CTRL2_CLKIE);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::disable_clock_out() {
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Read EEPROM CLKOUT Register (0x35)
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t eeprom_clkout = read_config_eeprom_ram_mirror(EEPROM_Clkout_Register);
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Clear CLKOE Bit
|
2021-05-10 06:23:34 +01:00
|
|
|
|
eeprom_clkout &= ~(1 << EEPROMClkout_CLKOE_BIT);
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Write EEPROM CLKOUT Register
|
2021-05-10 06:23:34 +01:00
|
|
|
|
write_config_eeprom_ram_mirror(EEPROM_Clkout_Register, eeprom_clkout);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Clear CLKIE Bit
|
2021-05-10 06:23:34 +01:00
|
|
|
|
clear_bit(RV3028_CTRL2, CTRL2_CLKIE);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
bool RV3028::read_clock_output_interrupt_flag() {
|
|
|
|
|
return read_bit(RV3028_STATUS, STATUS_CLKF);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::clear_clock_output_interrupt_flag() {
|
|
|
|
|
clear_bit(RV3028_STATUS, STATUS_CLKF);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Returns the status byte
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t RV3028::status(void) {
|
2021-05-14 18:12:37 +01:00
|
|
|
|
return read_register(RV3028_STATUS);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
void RV3028::clear_interrupts() { // Read the status register to clear the current interrupt flags
|
2021-05-10 06:23:34 +01:00
|
|
|
|
write_register(RV3028_STATUS, 0);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
/*********************************
|
|
|
|
|
FOR INTERNAL USE
|
|
|
|
|
********************************/
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t RV3028::bcd_to_dec(uint8_t val) {
|
2021-02-03 14:20:31 +00:00
|
|
|
|
return ((val / 0x10) * 10) + (val % 0x10);
|
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
// BCDtoDEC -- convert decimal to binary-coded decimal (BCD)
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t RV3028::dec_to_bcd(uint8_t val) {
|
2021-02-03 14:20:31 +00:00
|
|
|
|
return ((val / 10) * 0x10) + (val % 10);
|
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t RV3028::read_register(uint8_t addr) {
|
2021-02-03 14:20:31 +00:00
|
|
|
|
uint8_t b1[2];
|
2021-05-14 18:12:37 +01:00
|
|
|
|
if(1 == i2c->read_bytes(address, addr, b1, 1))
|
2021-02-03 14:20:31 +00:00
|
|
|
|
return b1[0];
|
2021-05-10 06:23:34 +01:00
|
|
|
|
else
|
|
|
|
|
return 0xFF; //Error
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
bool RV3028::write_register(uint8_t addr, uint8_t val) {
|
2021-02-03 14:20:31 +00:00
|
|
|
|
uint8_t b1[2];
|
|
|
|
|
b1[0] = val;
|
|
|
|
|
b1[1] = 0;
|
2021-05-14 18:12:37 +01:00
|
|
|
|
return i2c->write_bytes(address, addr, b1, 1);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
bool RV3028::read_multiple_registers(uint8_t addr, uint8_t *dest, uint8_t len) {
|
2021-05-14 18:12:37 +01:00
|
|
|
|
return i2c->read_bytes(address, addr, dest, len);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
bool RV3028::write_multiple_registers(uint8_t addr, uint8_t *values, uint8_t len) {
|
2021-05-14 18:12:37 +01:00
|
|
|
|
return i2c->write_bytes(address, addr, values, len);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
bool RV3028::write_config_eeprom_ram_mirror(uint8_t eeprom_addr, uint8_t val) {
|
|
|
|
|
bool success = wait_for_eeprom();
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Disable auto refresh by writing 1 to EERD control bit in CTRL1 register
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t ctrl1 = read_register(RV3028_CTRL1);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
ctrl1 |= 1 << CTRL1_EERD;
|
2021-05-10 06:23:34 +01:00
|
|
|
|
|
|
|
|
|
if(!write_register(RV3028_CTRL1, ctrl1))
|
|
|
|
|
success = false;
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Write Configuration RAM Register
|
2021-05-10 06:23:34 +01:00
|
|
|
|
write_register(eeprom_addr, val);
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Update EEPROM (All Configuration RAM -> EEPROM)
|
2021-05-10 06:23:34 +01:00
|
|
|
|
write_register(RV3028_EEPROM_CMD, EEPROMCMD_First);
|
|
|
|
|
write_register(RV3028_EEPROM_CMD, EEPROMCMD_Update);
|
|
|
|
|
|
|
|
|
|
if(!wait_for_eeprom())
|
|
|
|
|
success = false;
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Reenable auto refresh by writing 0 to EERD control bit in CTRL1 register
|
2021-05-10 06:23:34 +01:00
|
|
|
|
ctrl1 = read_register(RV3028_CTRL1);
|
|
|
|
|
if(ctrl1 == 0x00)
|
|
|
|
|
success = false;
|
|
|
|
|
|
2021-02-03 14:20:31 +00:00
|
|
|
|
ctrl1 &= ~(1 << CTRL1_EERD);
|
2021-05-10 06:23:34 +01:00
|
|
|
|
write_register(RV3028_CTRL1, ctrl1);
|
|
|
|
|
|
|
|
|
|
if(!wait_for_eeprom())
|
|
|
|
|
success = false;
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
|
|
|
|
return success;
|
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t RV3028::read_config_eeprom_ram_mirror(uint8_t eeprom_addr) {
|
|
|
|
|
bool success = wait_for_eeprom();
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Disable auto refresh by writing 1 to EERD control bit in CTRL1 register
|
2021-05-10 06:23:34 +01:00
|
|
|
|
uint8_t ctrl1 = read_register(RV3028_CTRL1);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
ctrl1 |= 1 << CTRL1_EERD;
|
2021-05-10 06:23:34 +01:00
|
|
|
|
if(!write_register(RV3028_CTRL1, ctrl1))
|
|
|
|
|
success = false;
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Read EEPROM Register
|
2021-05-10 06:23:34 +01:00
|
|
|
|
write_register(RV3028_EEPROM_ADDR, eeprom_addr);
|
|
|
|
|
write_register(RV3028_EEPROM_CMD, EEPROMCMD_First);
|
|
|
|
|
write_register(RV3028_EEPROM_CMD, EEPROMCMD_ReadSingle);
|
|
|
|
|
|
|
|
|
|
if(!wait_for_eeprom())
|
|
|
|
|
success = false;
|
|
|
|
|
|
|
|
|
|
uint8_t eeprom_data = read_register(RV3028_EEPROM_DATA);
|
|
|
|
|
if(!wait_for_eeprom())
|
|
|
|
|
success = false;
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// Reenable auto refresh by writing 0 to EERD control bit in CTRL1 register
|
2021-05-10 06:23:34 +01:00
|
|
|
|
ctrl1 = read_register(RV3028_CTRL1);
|
|
|
|
|
if(ctrl1 == 0x00)
|
|
|
|
|
success = false;
|
|
|
|
|
|
2021-02-03 14:20:31 +00:00
|
|
|
|
ctrl1 &= ~(1 << CTRL1_EERD);
|
2021-05-10 06:23:34 +01:00
|
|
|
|
write_register(RV3028_CTRL1, ctrl1);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
if(!success)
|
|
|
|
|
return 0xFF;
|
|
|
|
|
|
|
|
|
|
return eeprom_data;
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 15:57:56 +01:00
|
|
|
|
// True if success, false if timeout occured
|
2021-05-10 06:23:34 +01:00
|
|
|
|
bool RV3028::wait_for_eeprom() {
|
2021-02-03 14:20:31 +00:00
|
|
|
|
// Timeout is number of loops round while - don't have access to millisecond counter
|
|
|
|
|
unsigned long timeout = 500;
|
2021-05-10 06:23:34 +01:00
|
|
|
|
while ((read_register(RV3028_STATUS) & 1 << STATUS_EEBUSY) && --timeout > 0);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
return timeout > 0;
|
|
|
|
|
|
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::set_bit(uint8_t reg_addr, uint8_t bit_num) {
|
2021-05-14 18:12:37 +01:00
|
|
|
|
i2c->set_bits(address, reg_addr, bit_num, 0x01);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
void RV3028::clear_bit(uint8_t reg_addr, uint8_t bit_num) {
|
2021-05-14 18:12:37 +01:00
|
|
|
|
i2c->clear_bits(address, reg_addr, bit_num, 0x01);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
}
|
|
|
|
|
|
2021-05-10 06:23:34 +01:00
|
|
|
|
bool RV3028::read_bit(uint8_t reg_addr, uint8_t bit_num) {
|
2021-05-14 18:12:37 +01:00
|
|
|
|
uint8_t value = i2c->get_bits(address, reg_addr, bit_num, 0x01);
|
2021-02-03 14:20:31 +00:00
|
|
|
|
return value;
|
|
|
|
|
}
|
2021-05-10 06:23:34 +01:00
|
|
|
|
}
|