Commit Graph

79 Commits

Author SHA1 Message Date
EspoTek ef9e5d4cd0 ADC interrupt
Ensures that the transfers can all take place.  Still having issues...


Former-commit-id: c96c3717a01a4388facc2b960f7ab80549ba33ef
2017-01-19 14:48:55 +11:00
EspoTek 0f4871271a See last commit notes
This just updates the atsuo and a comment.


Former-commit-id: c518e9a45f9ee318a7c1af922bfa1a0e967b1d11
2017-01-19 10:29:17 +11:00
EspoTek e888d1d05f Runtime calibration
Finds the correct "magic numbers" automatically on launch.  No longer
have to edit due to hot day.


Former-commit-id: c38c9eb07c02ebf9e13637c8988c55d1836cb5cc
2017-01-19 10:28:02 +11:00
EspoTek 75219b5d24 Cleanup
3 lines erased.  That's all.


Former-commit-id: 288409c0507af2e5078d9bf1d3f05c482d4f27b4
2017-01-16 16:15:44 +11:00
EspoTek 56d50a41b5 Atsuo update
Now tracks variables that proved what occured in last test..


Former-commit-id: 590c161d50914d560d3907d4f89f913ba7fac789
2017-01-16 14:01:57 +11:00
EspoTek a803d427a9 Added state debug information
It looks like it's not flipping state at all.  Clocks are perfectly in
sync.........


Former-commit-id: 5b0fd65c3b28c2fb2380953a6db71de46f0ab412
2017-01-16 14:00:12 +11:00
EspoTek 23c3ef3ba1 TRFCNT stabilised
Added a "nop" interrupt to ADCA.CH0's completion, to give the DMA
channels time to catch up.
Doesn't seem to have fixed the problem!


Former-commit-id: e78939ee41d6fceb58b67e6f43211d271cd52fca
2017-01-16 13:28:59 +11:00
EspoTek 9bbc6724c0 Finally fixed clock skew!
And it looks like the garbage-on-display issue still exists.
Going to measure TRFCNT now.


Former-commit-id: 3ea8303ff8f24e5966de6bd5a38ce4917f818fe9
2017-01-16 13:02:20 +11:00
EspoTek 2d9c315d6d Fiddled with it a bit
Not sure how to strap to 12000.  I started one, but it seemed to lose
the lock after a while and then drift into glitchland.


Former-commit-id: ee5cb540eb7fdb980ac18f8e5bc47882d72407e9
2017-01-10 14:20:12 +11:00
EspoTek 4bbc738e8c Better but still with some nasty bugs
Code designed to pull code towards a CNT of 12000 pulls it towards 0.
Seems to be a long time before frame flips (30 seconds??), but they're
happening.  The time spend there may be less periodic.  Not sure,
haven't tested.  Going to try and strap to 12000 instead.  That's what
should be best, in theory.


Former-commit-id: cd1a0b582e42aca032a77ba61ba184f7492a2c11
2017-01-10 13:57:27 +11:00
EspoTek ae6d0af38c Steady clock!!
Well, HUUUUGE amounts of temporal noise, but no frame flips.  I'll go
test this out in the SW.


Former-commit-id: 09d259d39ab5b167fc3cb7186e767d6050f7ad11
2017-01-10 12:21:00 +11:00
EspoTek cd5a891a75 Calibration test added
and it looks promising!


Former-commit-id: 20654e25a34196a65b8dbdbf46cc2a8873e01072
2017-01-10 12:17:42 +11:00
EspoTek fc1f49eae4 PLL working
No fine-grain control, though.  On this particular board, tests look
like you've got the option between + 4% or -0.2%.


Former-commit-id: 58a256b564dbd39906fc4db2e20de0a4ca8c5706
2017-01-10 12:00:02 +11:00
EspoTek 5d04d75d9a Manual clock setup
Can enumerate over USB, but only when both sysclk and usbclk are running
from the 32MHz RC oscillator (DFLL'd up to 48MHz).

Good news is: no ASF!  Jej!


Former-commit-id: 27dae72dd15a1773e10a10ae89c3d5e3cbc896fb
2017-01-10 10:24:18 +11:00
EspoTek 5ae753d44f Calibration skeleton in - seems to do nothing?
Manually toggling the CALA/CALB registers seemed to do nothing to the
timer.  It was always off by 188.  Always creeping up...  Unless CALA
went to 0xff...!?!?


Former-commit-id: d97586cf182faba7282381e000dc622f2a503383
2017-01-09 16:47:04 +11:00
EspoTek 4dd657a164 CH2 no longer drifting
But is corrupting.


Former-commit-id: b60b82fb6c
2016-12-22 15:23:45 +11:00
EspoTek 45d6b89c0a Fixed Logic Analyzer CH2
Former-commit-id: 46d113259a
2016-12-20 10:52:21 +11:00
EspoTek fefba14eb1 And mode 7 up
Bugs found recently:
- Trigger doesn't work on negative voltages (at least in MM mode).
- Double Sample Rate button won't de-trigger when CH1 scope is disabled.


Former-commit-id: 56f329a016
2016-12-18 15:15:57 +11:00
EspoTek 33f052ccf7 Mode 6 Up
The error where every packet can become corrupt when you get a "bad
launch" seems more pronounced here.  But it still succeeds enough times
to show that correct synchronisation could fix it.


Former-commit-id: 85b86af1ff
2016-12-18 14:56:54 +11:00
EspoTek bf2697d80d Mode 4 Up
Although Logic Analyzer CH2 is faulty.  Looks like it's been in the code
for months, though.  Add that to the list of things to fix.


Former-commit-id: f76e8eb3a7
2016-12-18 14:44:57 +11:00
EspoTek c01b24e661 Mode 3 Up
And found the bug from before; or at least the trigger.  It seems to
only occur when the rear PCI USB port is used.  Front hub or rear USB2
ports don't show issues at all.


Former-commit-id: 653891ca63
2016-12-18 13:57:52 +11:00
EspoTek 25a2ab2a41 Committ before revert
Former-commit-id: 7fd9074207
2016-12-16 17:19:33 +11:00
EspoTek 282a9a394d Mode 2 Up.
And it looks like the old glitch has crept back in?  Was it not fixed
all along?


Former-commit-id: 536ba0ea4c
2016-12-16 15:56:53 +11:00
EspoTek 275394fc36 GUI responsive when device disconnected
But will not respond until device has been connected at least once!  On
a side note I found out how silly the saveState/loadState method in
genericUsbDriver was.  It was always a better idea to just "poke" the
signals to ensure that it is reset in the same way that would happen
from GUI interactions.


Former-commit-id: 57c841f1d7
2016-12-16 15:11:47 +11:00
EspoTek 9db4972573 Mode 1 Up
Mode 1 moved to the new system.  Same notes as mode 0.


Former-commit-id: 3d5c2b0b0a
2016-12-16 14:23:06 +11:00
EspoTek 02d4ba10da One packet per sample glitch gone!!!
From the looks of things, anyway.
This fix came with a cost:
- All modes apart from 0 are broken.
- Randomly, the DMA write and USB read may access the same half of
isoBuf.  This is determined on boot, and doesn't seem to desynchronise
and resynchronise over time.

The good news is that both of these have a fix.  Give it another day of
coding...


Former-commit-id: 23741ceecb
2016-12-15 13:52:44 +11:00
EspoTek 68453fe220 Triple endpoints working in SW now
Added triple endpoint support for the Desktop interface.
Should be possible to fix the one-packet-per-sample glitch easily, now.
Even if it isn't, the device now only needs to reserve 768 bytes/frame,
not 1023!!!!


Former-commit-id: 5769288a11
2016-12-15 09:52:43 +11:00
EspoTek b5ff947309 3 Iso Endpoints
Have moved from one big (1023 byte) iso endpoint to 3x 256 byte ones.
This will fix the error where Labrador is picky about which port it's
connected to, and *should* fix the one-sample-per-packet error.


Former-commit-id: 880303ed09
2016-12-13 10:46:13 +11:00
EspoTek dbc2865396 3 lines changed
Just to make debugging easier on the one-packet-per-frame-dropped error.


Former-commit-id: 88ddd41c8d
2016-12-08 10:44:42 +11:00
EspoTek f272a1f2bd Merge remote-tracking branch 'origin/master'
# Conflicts:
#	Desktop Interface/Labrador.pro.user


Former-commit-id: 0b1d5c5ec2
2016-12-08 08:40:29 +11:00
EspoTek 86d74f5dc2 Sped up serial decode dramatically
Swapped an append to a replace with an ADT designed to return fast
pointers to char[] blocks.

Worked out that the one-corrupt-sample-per-packet bug was definitely not
fixed.  I must have been looking at a 1kHz wave before.


Former-commit-id: d3054d9707
2016-12-08 08:39:22 +11:00
EspoTek 7b959d6fdb Changed default search directory
functionGenControl and espoComboBox now use QCoreApplication::
applicationDirPath().  This is to fix deploys on Mac.  It’s possible
but unlikely that it broke Windows/Linux.


Former-commit-id: 3bcf78e4c4
2016-11-30 10:58:34 +11:00
EspoTek 9179073975 Code cleanup
Added comments and a folder structure.  No functional changes.


Former-commit-id: 644359d1a2
2016-11-29 09:56:21 +11:00
EspoTek adaaa63eb7 Added more #defines to code
These #defines are located in desktop_settings.h and allow you to edit
how many samples are discarded per packet.  The idea was to use this to
test the MCU-side code and ensure that it doesn't corrupt a packet per
frame, but this seems to have magically disappeared (???).

I remember queueing USB transfers a long time ago, but can't remember
this having any success.  It's more likely to just be a random clock
skew issue that only appears on some boards - and it's only "fixed" on
the one particular test board I have in hand now.  I think.


Former-commit-id: b32392b525
2016-11-28 10:38:14 +11:00
EspoTek e1c451ebb2 Plotted and done
Made up the silkscreen layers, put down the stabiliser pin and it's all
ready to be sent off now!


Former-commit-id: 1c6201a7f3
2016-11-23 12:16:40 +11:00
EspoTek 2069cf2e16 FInished the board.
Just need to position balange pins.  Design seems tight, with really low
power supply distances.


Former-commit-id: 0964cc7e6a
2016-11-22 21:06:41 +11:00
EspoTek 9879262085 Redoing the board
Signal gen and PSU wired in.  Very happy!


Former-commit-id: b521416f48
2016-11-22 14:01:56 +11:00
EspoTek 09b492bfd0 Swapped all components to SMD
Board too dense.  Going to start again.


Former-commit-id: edf9c8904b
2016-11-22 10:03:11 +11:00
EspoTek 542daed722 More board work.
It's a bit dense; some would say unnecessarily so.  Might see what I can
do with it in the morning but there's a reasonable chance it'll become
unworkable.


Former-commit-id: a1e508cc1a
2016-11-20 21:17:47 +11:00
EspoTek f758213761 PSU in place
First attempt, anyway.  Far shorter grounding than last rev!  Very
happy!


Former-commit-id: f0fa88c473
2016-11-20 18:39:26 +11:00
EspoTek 8b8a748a5d Named headers
Also there's now an empty kicad_pcb file.


Former-commit-id: 59c472fedb
2016-11-20 17:35:25 +11:00
EspoTek b55a66a0f2 Error fix from last eschema
Accidentally set 2x4 headers rather than 1x4.  This has been fixed.


Former-commit-id: c5408e5c1b
2016-11-20 17:31:44 +11:00
EspoTek fedc1f8892 Another Eschema Update
Have changed pinout of scope.
Still haven't added SMD pads for inductor/diode since the Element14 is
not playing ball.


Former-commit-id: 3dde628793
2016-11-20 17:29:05 +11:00
EspoTek 2318c94755 New Eschema
- Reverted the dual transistor IC back to a single transistor (TSM
thingo)
- Added PSU indicator LED
- Added PSU control/expansion header.

Note that this is only in eschema, not pcbnew!


Former-commit-id: 059d5cbe65
2016-11-20 15:52:25 +11:00
EspoTek 95c5a4b95d Undid PCB revert
I don't want to deal with KiCAD's library management again.  The first
time was bad enough.


Former-commit-id: 2696688130
2016-11-19 18:20:44 +11:00
EspoTek 44bf2d39c4 Reverted PCB files to initial upload
Going to have a final attempt now!


Former-commit-id: bf98f0796f
2016-11-19 17:42:15 +11:00
EspoTek 6a008946d1 Slight change to terminology
Changed things like "Aplitude" to "Amplitude (peak-peak)".
Just to make things a bit less confusing for the user.


Former-commit-id: c9c98b0295
2016-11-19 17:29:41 +11:00
EspoTek ec339d1a76 Update README.md
Former-commit-id: 2f4d8f928b
2016-11-17 11:40:13 +11:00
EspoTek 21832f4d55 Added a single #define
That's it.  Literally a single #define that determines how many
milliseconds the OS waits before reconnecting.  Fixed an error with
Windows not reading it on new mobo, hopefully fixes it under OS X as
well.


Former-commit-id: d69bbf8e68
2016-11-10 17:39:40 +11:00
EspoTek 4c25a50696 Pushing Windows
Going to revert and compare.


Former-commit-id: 8d0f6dbeeb
2016-11-10 15:50:34 +11:00