2014-11-27 20:30:33 +00:00
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/******************************************************************************
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* Copyright 2013-2014 Espressif Systems (Wuxi)
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*
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* FileName: uart.c
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*
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* Description: Two UART mode configration and interrupt handler.
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* Check your hardware connection while use this mode.
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*
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* Modification history:
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* 2014/3/12, v1.0 create this file.
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*******************************************************************************/
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#include "ets_sys.h"
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#include "osapi.h"
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#include "uart.h"
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#include "osapi.h"
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#include "uart_register.h"
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#include "etshal.h"
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#include "c_types.h"
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2015-01-15 23:54:40 +00:00
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#include "user_interface.h"
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#include "esp_mphal.h"
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2014-11-27 20:30:33 +00:00
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#define RX_BUF_SIZE (256)
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// UartDev is defined and initialized in rom code.
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extern UartDevice UartDev;
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// circular buffer for RX buffering
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static uint16_t rx_buf_in;
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static uint16_t rx_buf_out;
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static uint8_t rx_buf[RX_BUF_SIZE];
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2015-01-15 23:54:40 +00:00
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static os_event_t uart_evt_queue[16];
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2014-11-27 20:30:33 +00:00
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static void uart0_rx_intr_handler(void *para);
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/******************************************************************************
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* FunctionName : uart_config
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* Description : Internal used function
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* UART0 used for data TX/RX, RX buffer size is 0x100, interrupt enabled
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* UART1 just used for debug output
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* Parameters : uart_no, use UART0 or UART1 defined ahead
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* Returns : NONE
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*******************************************************************************/
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static void ICACHE_FLASH_ATTR uart_config(uint8 uart_no) {
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if (uart_no == UART1) {
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK);
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} else {
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ETS_UART_INTR_ATTACH(uart0_rx_intr_handler, NULL);
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PIN_PULLUP_DIS(PERIPHS_IO_MUX_U0TXD_U);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_U0TXD_U, FUNC_U0TXD);
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PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS);
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}
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uart_div_modify(uart_no, UART_CLK_FREQ / (UartDev.baut_rate));
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WRITE_PERI_REG(UART_CONF0(uart_no), UartDev.exist_parity
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| UartDev.parity
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| (UartDev.stop_bits << UART_STOP_BIT_NUM_S)
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| (UartDev.data_bits << UART_BIT_NUM_S));
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// clear rx and tx fifo,not ready
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SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
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CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST);
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if (uart_no == UART0) {
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// set rx fifo trigger
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WRITE_PERI_REG(UART_CONF1(uart_no),
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((0x10 & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S) |
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((0x10 & UART_RX_FLOW_THRHD) << UART_RX_FLOW_THRHD_S) |
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UART_RX_FLOW_EN |
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(0x02 & UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S |
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UART_RX_TOUT_EN);
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SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_TOUT_INT_ENA |
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UART_FRM_ERR_INT_ENA);
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} else {
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WRITE_PERI_REG(UART_CONF1(uart_no),
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((UartDev.rcv_buff.TrigLvl & UART_RXFIFO_FULL_THRHD) << UART_RXFIFO_FULL_THRHD_S));
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}
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// clear all interrupt
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WRITE_PERI_REG(UART_INT_CLR(uart_no), 0xffff);
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// enable rx_interrupt
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SET_PERI_REG_MASK(UART_INT_ENA(uart_no), UART_RXFIFO_FULL_INT_ENA);
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// init RX buffer
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rx_buf_in = 0;
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rx_buf_out = 0;
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}
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/******************************************************************************
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* FunctionName : uart1_tx_one_char
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* Description : Internal used function
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* Use uart1 interface to transfer one char
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* Parameters : uint8 TxChar - character to tx
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* Returns : OK
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*******************************************************************************/
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void uart_tx_one_char(uint8 uart, uint8 TxChar) {
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while (true) {
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uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT<<UART_TXFIFO_CNT_S);
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if ((fifo_cnt >> UART_TXFIFO_CNT_S & UART_TXFIFO_CNT) < 126) {
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break;
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}
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}
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WRITE_PERI_REG(UART_FIFO(uart), TxChar);
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}
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/******************************************************************************
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* FunctionName : uart1_write_char
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* Description : Internal used function
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* Do some special deal while tx char is '\r' or '\n'
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* Parameters : char c - character to tx
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* Returns : NONE
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*******************************************************************************/
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static void ICACHE_FLASH_ATTR
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uart1_write_char(char c) {
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if (c == '\n') {
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uart_tx_one_char(UART1, '\r');
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uart_tx_one_char(UART1, '\n');
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} else if (c == '\r') {
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} else {
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uart_tx_one_char(UART1, c);
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}
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}
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/******************************************************************************
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* FunctionName : uart0_rx_intr_handler
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* Description : Internal used function
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* UART0 interrupt handler, add self handle code inside
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* Parameters : void *para - point to ETS_UART_INTR_ATTACH's arg
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* Returns : NONE
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*******************************************************************************/
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static void uart0_rx_intr_handler(void *para) {
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/* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents
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* uart1 and uart0 respectively
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*/
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uint8 RcvChar;
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uint8 uart_no = UART0;
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if (UART_FRM_ERR_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_FRM_ERR_INT_ST)) {
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// frame error
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WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_FRM_ERR_INT_CLR);
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}
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if (UART_RXFIFO_FULL_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_FULL_INT_ST)) {
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// fifo full
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WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_FULL_INT_CLR);
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goto read_chars;
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} else if (UART_RXFIFO_TOUT_INT_ST == (READ_PERI_REG(UART_INT_ST(uart_no)) & UART_RXFIFO_TOUT_INT_ST)) {
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WRITE_PERI_REG(UART_INT_CLR(uart_no), UART_RXFIFO_TOUT_INT_CLR);
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read_chars:
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while (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_RXFIFO_CNT << UART_RXFIFO_CNT_S)) {
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RcvChar = READ_PERI_REG(UART_FIFO(uart_no)) & 0xff;
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2015-01-15 23:54:40 +00:00
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#if 1 //MICROPY_REPL_EVENT_DRIVEN is not available here
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system_os_post(UART_TASK_ID, 0, RcvChar);
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#else
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2014-11-27 20:30:33 +00:00
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uint16_t rx_buf_in_next = (rx_buf_in + 1) % RX_BUF_SIZE;
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if (rx_buf_in_next != rx_buf_out) {
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rx_buf[rx_buf_in] = RcvChar;
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rx_buf_in = rx_buf_in_next;
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}
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2015-01-15 23:54:40 +00:00
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#endif
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2014-11-27 20:30:33 +00:00
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}
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}
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}
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int uart0_rx(void) {
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if (rx_buf_out != rx_buf_in) {
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int chr = rx_buf[rx_buf_out];
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rx_buf_out = (rx_buf_out + 1) % RX_BUF_SIZE;
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return chr;
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} else {
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return -1;
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}
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}
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/******************************************************************************
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* FunctionName : uart_init
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* Description : user interface for init uart
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* Parameters : UartBautRate uart0_br - uart0 bautrate
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* UartBautRate uart1_br - uart1 bautrate
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* Returns : NONE
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*******************************************************************************/
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void ICACHE_FLASH_ATTR uart_init(UartBautRate uart0_br, UartBautRate uart1_br) {
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// rom use 74880 baut_rate, here reinitialize
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UartDev.baut_rate = uart0_br;
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uart_config(UART0);
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UartDev.baut_rate = uart1_br;
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uart_config(UART1);
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ETS_UART_INTR_ENABLE();
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// install uart1 putc callback
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os_install_putc1((void *)uart1_write_char);
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}
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void ICACHE_FLASH_ATTR uart_reattach() {
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uart_init(UART_BIT_RATE_74880, UART_BIT_RATE_74880);
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}
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2015-01-15 23:54:40 +00:00
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// Task-based UART interface
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2015-05-06 00:02:58 +01:00
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#include "py/obj.h"
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#include "stmhal/pyexec.h"
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void soft_reset(void);
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2015-01-15 23:54:40 +00:00
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void uart_task_handler(os_event_t *evt) {
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2015-05-06 00:02:58 +01:00
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int ret = pyexec_event_repl_process_char(evt->par);
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if (ret & PYEXEC_FORCED_EXIT) {
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soft_reset();
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}
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2015-01-15 23:54:40 +00:00
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}
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void uart_task_init() {
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system_os_task(uart_task_handler, UART_TASK_ID, uart_evt_queue, sizeof(uart_evt_queue) / sizeof(*uart_evt_queue));
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}
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