2014-05-03 23:27:38 +01:00
|
|
|
/*
|
|
|
|
* This file is part of the Micro Python project, http://micropython.org/
|
|
|
|
*
|
|
|
|
* The MIT License (MIT)
|
|
|
|
*
|
|
|
|
* Copyright (c) 2013, 2014 Damien P. George
|
|
|
|
*
|
|
|
|
* Permission is hereby granted, free of charge, to any person obtaining a copy
|
|
|
|
* of this software and associated documentation files (the "Software"), to deal
|
|
|
|
* in the Software without restriction, including without limitation the rights
|
|
|
|
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
|
|
|
|
* copies of the Software, and to permit persons to whom the Software is
|
|
|
|
* furnished to do so, subject to the following conditions:
|
|
|
|
*
|
|
|
|
* The above copyright notice and this permission notice shall be included in
|
|
|
|
* all copies or substantial portions of the Software.
|
|
|
|
*
|
|
|
|
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
|
|
|
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
|
|
|
|
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
|
|
|
|
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
|
|
|
|
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
|
|
|
|
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
|
|
|
|
* THE SOFTWARE.
|
|
|
|
*/
|
|
|
|
|
2014-03-13 01:06:26 +00:00
|
|
|
#include <stdio.h>
|
|
|
|
#include <string.h>
|
2014-08-21 22:48:23 +01:00
|
|
|
#include <stdarg.h>
|
2014-03-13 01:06:26 +00:00
|
|
|
|
2015-01-01 21:06:20 +00:00
|
|
|
#include "py/nlr.h"
|
|
|
|
#include "py/runtime.h"
|
|
|
|
#include "py/stream.h"
|
2016-05-10 23:22:54 +01:00
|
|
|
#include "py/mperrno.h"
|
2015-10-30 23:03:58 +00:00
|
|
|
#include "py/mphal.h"
|
2014-04-21 12:03:09 +01:00
|
|
|
#include "uart.h"
|
2015-10-31 17:44:20 +00:00
|
|
|
#include "irq.h"
|
2016-12-05 01:21:45 +00:00
|
|
|
#include "genhdr/pins.h"
|
2014-03-13 01:06:26 +00:00
|
|
|
|
2015-08-03 23:07:20 +01:00
|
|
|
//TODO: Add UART7/8 support for MCU_SERIES_F7
|
2015-07-28 19:13:33 +01:00
|
|
|
|
2014-04-29 22:55:34 +01:00
|
|
|
/// \moduleref pyb
|
|
|
|
/// \class UART - duplex serial communication bus
|
|
|
|
///
|
|
|
|
/// UART implements the standard UART/USART duplex serial communications protocol. At
|
2014-10-11 17:57:10 +01:00
|
|
|
/// the physical level it consists of 2 lines: RX and TX. The unit of communication
|
|
|
|
/// is a character (not to be confused with a string character) which can be 8 or 9
|
|
|
|
/// bits wide.
|
2014-04-29 22:55:34 +01:00
|
|
|
///
|
2014-10-11 17:57:10 +01:00
|
|
|
/// UART objects can be created and initialised using:
|
2014-04-29 22:55:34 +01:00
|
|
|
///
|
|
|
|
/// from pyb import UART
|
|
|
|
///
|
|
|
|
/// uart = UART(1, 9600) # init with given baudrate
|
2014-10-11 17:57:10 +01:00
|
|
|
/// uart.init(9600, bits=8, parity=None, stop=1) # init with given parameters
|
2014-04-29 22:55:34 +01:00
|
|
|
///
|
2014-10-11 17:57:10 +01:00
|
|
|
/// Bits can be 8 or 9. Parity can be None, 0 (even) or 1 (odd). Stop can be 1 or 2.
|
2014-04-29 22:55:34 +01:00
|
|
|
///
|
2014-10-11 17:57:10 +01:00
|
|
|
/// A UART object acts like a stream object and reading and writing is done
|
|
|
|
/// using the standard stream methods:
|
|
|
|
///
|
|
|
|
/// uart.read(10) # read 10 characters, returns a bytes object
|
2016-11-13 21:24:22 +00:00
|
|
|
/// uart.read() # read all available characters
|
2014-10-11 17:57:10 +01:00
|
|
|
/// uart.readline() # read a line
|
|
|
|
/// uart.readinto(buf) # read and store into the given buffer
|
|
|
|
/// uart.write('abc') # write the 3 characters
|
|
|
|
///
|
|
|
|
/// Individual characters can be read/written using:
|
|
|
|
///
|
|
|
|
/// uart.readchar() # read 1 character and returns it as an integer
|
|
|
|
/// uart.writechar(42) # write 1 character
|
|
|
|
///
|
|
|
|
/// To check if there is anything to be read, use:
|
2014-04-29 22:55:34 +01:00
|
|
|
///
|
|
|
|
/// uart.any() # returns True if any characters waiting
|
2014-04-21 01:59:43 +01:00
|
|
|
|
2014-10-11 17:57:10 +01:00
|
|
|
#define CHAR_WIDTH_8BIT (0)
|
|
|
|
#define CHAR_WIDTH_9BIT (1)
|
|
|
|
|
2014-04-21 12:03:09 +01:00
|
|
|
struct _pyb_uart_obj_t {
|
2014-03-16 07:22:22 +00:00
|
|
|
mp_obj_base_t base;
|
2014-10-31 20:28:10 +00:00
|
|
|
UART_HandleTypeDef uart; // this is 17 words big
|
2014-10-11 17:57:10 +01:00
|
|
|
IRQn_Type irqn;
|
2014-10-31 20:28:10 +00:00
|
|
|
pyb_uart_t uart_id : 8;
|
|
|
|
bool is_enabled : 1;
|
|
|
|
byte char_width; // 0 for 7,8 bit chars, 1 for 9 bit chars
|
|
|
|
uint16_t char_mask; // 0x7f for 7 bit, 0xff for 8 bit, 0x1ff for 9 bit
|
2014-10-11 17:57:10 +01:00
|
|
|
uint16_t timeout; // timeout waiting for first char
|
|
|
|
uint16_t timeout_char; // timeout waiting between chars
|
|
|
|
uint16_t read_buf_len; // len in chars; buf can hold len-1 chars
|
|
|
|
volatile uint16_t read_buf_head; // indexes first empty slot
|
|
|
|
uint16_t read_buf_tail; // indexes first full slot (not full if equals head)
|
|
|
|
byte *read_buf; // byte or uint16_t, depending on char size
|
2014-03-16 07:22:22 +00:00
|
|
|
};
|
2014-03-13 01:06:26 +00:00
|
|
|
|
2014-10-11 17:57:10 +01:00
|
|
|
STATIC mp_obj_t pyb_uart_deinit(mp_obj_t self_in);
|
|
|
|
|
|
|
|
void uart_init0(void) {
|
2015-01-07 23:38:50 +00:00
|
|
|
for (int i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_uart_obj_all)); i++) {
|
|
|
|
MP_STATE_PORT(pyb_uart_obj_all)[i] = NULL;
|
2014-10-11 17:57:10 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
// unregister all interrupt sources
|
|
|
|
void uart_deinit(void) {
|
2015-01-07 23:38:50 +00:00
|
|
|
for (int i = 0; i < MP_ARRAY_SIZE(MP_STATE_PORT(pyb_uart_obj_all)); i++) {
|
|
|
|
pyb_uart_obj_t *uart_obj = MP_STATE_PORT(pyb_uart_obj_all)[i];
|
2014-10-11 17:57:10 +01:00
|
|
|
if (uart_obj != NULL) {
|
|
|
|
pyb_uart_deinit(uart_obj);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-04-21 01:14:14 +01:00
|
|
|
// assumes Init parameters have been set up correctly
|
2014-10-31 00:40:57 +00:00
|
|
|
STATIC bool uart_init2(pyb_uart_obj_t *uart_obj) {
|
2014-10-11 17:57:10 +01:00
|
|
|
USART_TypeDef *UARTx;
|
|
|
|
IRQn_Type irqn;
|
2016-12-05 01:21:45 +00:00
|
|
|
int uart_unit;
|
2014-03-13 01:06:26 +00:00
|
|
|
|
2016-12-05 01:21:45 +00:00
|
|
|
const pin_obj_t *pins[4] = {0};
|
2014-04-14 01:45:58 +01:00
|
|
|
|
2016-12-05 01:21:45 +00:00
|
|
|
switch (uart_obj->uart_id) {
|
|
|
|
#if defined(MICROPY_HW_UART1_TX) && defined(MICROPY_HW_UART1_RX)
|
2015-08-03 00:23:47 +01:00
|
|
|
case PYB_UART_1:
|
2016-12-05 01:21:45 +00:00
|
|
|
uart_unit = 1;
|
2015-08-03 00:23:47 +01:00
|
|
|
UARTx = USART1;
|
|
|
|
irqn = USART1_IRQn;
|
2016-12-05 01:21:45 +00:00
|
|
|
pins[0] = &MICROPY_HW_UART1_TX;
|
|
|
|
pins[1] = &MICROPY_HW_UART1_RX;
|
2015-08-03 00:23:47 +01:00
|
|
|
__USART1_CLK_ENABLE();
|
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
|
2016-12-05 01:21:45 +00:00
|
|
|
#if defined(MICROPY_HW_UART2_TX) && defined(MICROPY_HW_UART2_RX)
|
2014-04-21 12:03:09 +01:00
|
|
|
case PYB_UART_2:
|
2016-12-05 01:21:45 +00:00
|
|
|
uart_unit = 2;
|
2014-04-21 12:03:09 +01:00
|
|
|
UARTx = USART2;
|
2014-10-11 17:57:10 +01:00
|
|
|
irqn = USART2_IRQn;
|
2016-12-05 01:21:45 +00:00
|
|
|
pins[0] = &MICROPY_HW_UART2_TX;
|
|
|
|
pins[1] = &MICROPY_HW_UART2_RX;
|
2015-05-02 17:31:39 +01:00
|
|
|
#if defined(MICROPY_HW_UART2_RTS)
|
2014-10-31 00:40:57 +00:00
|
|
|
if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_RTS) {
|
2016-12-05 01:21:45 +00:00
|
|
|
pins[2] = &MICROPY_HW_UART2_RTS;
|
2014-10-31 00:40:57 +00:00
|
|
|
}
|
2015-05-02 17:31:39 +01:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_UART2_CTS)
|
2014-10-31 00:40:57 +00:00
|
|
|
if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) {
|
2016-12-05 01:21:45 +00:00
|
|
|
pins[3] = &MICROPY_HW_UART2_CTS;
|
2014-10-31 00:40:57 +00:00
|
|
|
}
|
2015-05-02 17:31:39 +01:00
|
|
|
#endif
|
2014-03-13 01:06:26 +00:00
|
|
|
__USART2_CLK_ENABLE();
|
|
|
|
break;
|
2015-05-02 17:31:39 +01:00
|
|
|
#endif
|
2014-04-14 01:45:58 +01:00
|
|
|
|
2016-12-05 01:21:45 +00:00
|
|
|
#if defined(MICROPY_HW_UART3_TX) && defined(MICROPY_HW_UART3_RX)
|
2014-04-21 12:03:09 +01:00
|
|
|
case PYB_UART_3:
|
2016-12-05 01:21:45 +00:00
|
|
|
uart_unit = 3;
|
2014-04-21 12:03:09 +01:00
|
|
|
UARTx = USART3;
|
2014-10-11 17:57:10 +01:00
|
|
|
irqn = USART3_IRQn;
|
2016-12-05 01:21:45 +00:00
|
|
|
pins[0] = &MICROPY_HW_UART3_TX;
|
|
|
|
pins[1] = &MICROPY_HW_UART3_RX;
|
2015-05-02 17:31:39 +01:00
|
|
|
#if defined(MICROPY_HW_UART3_RTS)
|
2014-10-31 00:40:57 +00:00
|
|
|
if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_RTS) {
|
2016-12-05 01:21:45 +00:00
|
|
|
pins[2] = &MICROPY_HW_UART3_RTS;
|
2014-10-31 00:40:57 +00:00
|
|
|
}
|
2015-05-02 17:31:39 +01:00
|
|
|
#endif
|
|
|
|
#if defined(MICROPY_HW_UART3_CTS)
|
2014-10-31 00:40:57 +00:00
|
|
|
if (uart_obj->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) {
|
2016-12-05 01:21:45 +00:00
|
|
|
pins[3] = &MICROPY_HW_UART3_CTS;
|
2014-10-31 00:40:57 +00:00
|
|
|
}
|
2015-05-02 17:31:39 +01:00
|
|
|
#endif
|
2014-03-13 01:06:26 +00:00
|
|
|
__USART3_CLK_ENABLE();
|
|
|
|
break;
|
2015-04-18 15:59:08 +01:00
|
|
|
#endif
|
2014-04-14 01:45:58 +01:00
|
|
|
|
2016-12-05 01:21:45 +00:00
|
|
|
#if defined(MICROPY_HW_UART4_TX) && defined(MICROPY_HW_UART4_RX)
|
2014-04-21 12:03:09 +01:00
|
|
|
case PYB_UART_4:
|
2016-12-05 01:21:45 +00:00
|
|
|
uart_unit = 4;
|
2014-04-21 12:03:09 +01:00
|
|
|
UARTx = UART4;
|
2014-10-11 17:57:10 +01:00
|
|
|
irqn = UART4_IRQn;
|
2016-12-05 01:21:45 +00:00
|
|
|
pins[0] = &MICROPY_HW_UART4_TX;
|
|
|
|
pins[1] = &MICROPY_HW_UART4_RX;
|
2014-04-14 01:45:58 +01:00
|
|
|
__UART4_CLK_ENABLE();
|
|
|
|
break;
|
2015-04-18 15:59:08 +01:00
|
|
|
#endif
|
2014-04-14 01:45:58 +01:00
|
|
|
|
2016-12-05 01:21:45 +00:00
|
|
|
#if defined(MICROPY_HW_UART5_TX) && defined(MICROPY_HW_UART5_RX)
|
2015-05-31 23:37:37 +01:00
|
|
|
case PYB_UART_5:
|
2016-12-05 01:21:45 +00:00
|
|
|
uart_unit = 5;
|
2015-05-31 23:37:37 +01:00
|
|
|
UARTx = UART5;
|
|
|
|
irqn = UART5_IRQn;
|
2016-12-05 01:21:45 +00:00
|
|
|
pins[0] = &MICROPY_HW_UART5_TX;
|
|
|
|
pins[1] = &MICROPY_HW_UART5_RX;
|
2015-05-31 23:37:37 +01:00
|
|
|
__UART5_CLK_ENABLE();
|
|
|
|
break;
|
|
|
|
#endif
|
|
|
|
|
2016-12-05 01:21:45 +00:00
|
|
|
#if defined(MICROPY_HW_UART6_TX) && defined(MICROPY_HW_UART6_RX)
|
2014-04-21 12:03:09 +01:00
|
|
|
case PYB_UART_6:
|
2016-12-05 01:21:45 +00:00
|
|
|
uart_unit = 6;
|
2014-04-21 12:03:09 +01:00
|
|
|
UARTx = USART6;
|
2014-10-11 17:57:10 +01:00
|
|
|
irqn = USART6_IRQn;
|
2016-12-05 01:21:45 +00:00
|
|
|
pins[0] = &MICROPY_HW_UART6_TX;
|
|
|
|
pins[1] = &MICROPY_HW_UART6_RX;
|
2014-03-13 01:06:26 +00:00
|
|
|
__USART6_CLK_ENABLE();
|
|
|
|
break;
|
2015-05-02 17:31:39 +01:00
|
|
|
#endif
|
2014-04-14 01:45:58 +01:00
|
|
|
|
|
|
|
default:
|
2015-05-02 17:31:39 +01:00
|
|
|
// UART does not exist or is not configured for this board
|
2014-04-14 01:45:58 +01:00
|
|
|
return false;
|
2014-03-13 01:06:26 +00:00
|
|
|
}
|
|
|
|
|
2016-12-05 01:21:45 +00:00
|
|
|
uint32_t mode = MP_HAL_PIN_MODE_ALT;
|
|
|
|
uint32_t pull = MP_HAL_PIN_PULL_UP;
|
2014-10-11 17:57:10 +01:00
|
|
|
|
2016-12-05 01:21:45 +00:00
|
|
|
for (uint i = 0; i < 4; i++) {
|
|
|
|
if (pins[i] != NULL) {
|
|
|
|
bool ret = mp_hal_pin_config_alt(pins[i], mode, pull, AF_FN_UART, uart_unit);
|
|
|
|
if (!ret) {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
}
|
2015-08-03 00:20:08 +01:00
|
|
|
}
|
|
|
|
|
2016-12-05 01:21:45 +00:00
|
|
|
uart_obj->irqn = irqn;
|
|
|
|
uart_obj->uart.Instance = UARTx;
|
|
|
|
|
2014-04-21 12:03:09 +01:00
|
|
|
// init UARTx
|
|
|
|
HAL_UART_Init(&uart_obj->uart);
|
2014-04-21 01:14:14 +01:00
|
|
|
|
2014-04-21 12:03:09 +01:00
|
|
|
uart_obj->is_enabled = true;
|
2014-04-21 01:14:14 +01:00
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
2014-10-11 17:57:10 +01:00
|
|
|
/* obsolete and unused
|
2014-04-21 12:03:09 +01:00
|
|
|
bool uart_init(pyb_uart_obj_t *uart_obj, uint32_t baudrate) {
|
|
|
|
UART_HandleTypeDef *uh = &uart_obj->uart;
|
2014-03-16 07:22:22 +00:00
|
|
|
memset(uh, 0, sizeof(*uh));
|
|
|
|
uh->Init.BaudRate = baudrate;
|
2014-04-21 01:14:14 +01:00
|
|
|
uh->Init.WordLength = UART_WORDLENGTH_8B;
|
|
|
|
uh->Init.StopBits = UART_STOPBITS_1;
|
|
|
|
uh->Init.Parity = UART_PARITY_NONE;
|
|
|
|
uh->Init.Mode = UART_MODE_TX_RX;
|
2014-03-16 07:22:22 +00:00
|
|
|
uh->Init.HwFlowCtl = UART_HWCONTROL_NONE;
|
|
|
|
uh->Init.OverSampling = UART_OVERSAMPLING_16;
|
2014-04-21 12:03:09 +01:00
|
|
|
return uart_init2(uart_obj);
|
2014-04-21 01:14:14 +01:00
|
|
|
}
|
2014-10-11 17:57:10 +01:00
|
|
|
*/
|
2014-04-14 01:45:58 +01:00
|
|
|
|
2015-11-27 15:31:59 +00:00
|
|
|
mp_uint_t uart_rx_any(pyb_uart_obj_t *self) {
|
|
|
|
int buffer_bytes = self->read_buf_head - self->read_buf_tail;
|
|
|
|
if (buffer_bytes < 0) {
|
|
|
|
return buffer_bytes + self->read_buf_len;
|
|
|
|
} else if (buffer_bytes > 0) {
|
|
|
|
return buffer_bytes;
|
|
|
|
} else {
|
|
|
|
return __HAL_UART_GET_FLAG(&self->uart, UART_FLAG_RXNE) != RESET;
|
|
|
|
}
|
2014-03-13 01:06:26 +00:00
|
|
|
}
|
|
|
|
|
2014-10-11 17:57:10 +01:00
|
|
|
// Waits at most timeout milliseconds for at least 1 char to become ready for
|
|
|
|
// reading (from buf or for direct reading).
|
|
|
|
// Returns true if something available, false if not.
|
|
|
|
STATIC bool uart_rx_wait(pyb_uart_obj_t *self, uint32_t timeout) {
|
|
|
|
uint32_t start = HAL_GetTick();
|
|
|
|
for (;;) {
|
|
|
|
if (self->read_buf_tail != self->read_buf_head || __HAL_UART_GET_FLAG(&self->uart, UART_FLAG_RXNE) != RESET) {
|
|
|
|
return true; // have at least 1 char ready for reading
|
|
|
|
}
|
|
|
|
if (HAL_GetTick() - start >= timeout) {
|
|
|
|
return false; // timeout
|
|
|
|
}
|
|
|
|
__WFI();
|
|
|
|
}
|
2014-03-13 01:06:26 +00:00
|
|
|
}
|
|
|
|
|
2014-10-11 17:57:10 +01:00
|
|
|
// assumes there is a character available
|
|
|
|
int uart_rx_char(pyb_uart_obj_t *self) {
|
|
|
|
if (self->read_buf_tail != self->read_buf_head) {
|
|
|
|
// buffering via IRQ
|
|
|
|
int data;
|
|
|
|
if (self->char_width == CHAR_WIDTH_9BIT) {
|
|
|
|
data = ((uint16_t*)self->read_buf)[self->read_buf_tail];
|
|
|
|
} else {
|
|
|
|
data = self->read_buf[self->read_buf_tail];
|
|
|
|
}
|
|
|
|
self->read_buf_tail = (self->read_buf_tail + 1) % self->read_buf_len;
|
2016-03-25 10:20:12 +00:00
|
|
|
if (__HAL_UART_GET_FLAG(&self->uart, UART_FLAG_RXNE) != RESET) {
|
|
|
|
// UART was stalled by flow ctrl: re-enable IRQ now we have room in buffer
|
|
|
|
__HAL_UART_ENABLE_IT(&self->uart, UART_IT_RXNE);
|
|
|
|
}
|
2014-10-11 17:57:10 +01:00
|
|
|
return data;
|
|
|
|
} else {
|
|
|
|
// no buffering
|
2016-04-17 11:59:33 +01:00
|
|
|
#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4)
|
2015-07-28 19:13:33 +01:00
|
|
|
return self->uart.Instance->RDR & self->char_mask;
|
|
|
|
#else
|
2014-10-31 20:28:10 +00:00
|
|
|
return self->uart.Instance->DR & self->char_mask;
|
2015-07-28 19:13:33 +01:00
|
|
|
#endif
|
2014-03-13 01:06:26 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2015-11-30 17:29:52 +00:00
|
|
|
// Waits at most timeout milliseconds for TX register to become empty.
|
|
|
|
// Returns true if can write, false if can't.
|
|
|
|
STATIC bool uart_tx_wait(pyb_uart_obj_t *self, uint32_t timeout) {
|
|
|
|
uint32_t start = HAL_GetTick();
|
|
|
|
for (;;) {
|
|
|
|
if (__HAL_UART_GET_FLAG(&self->uart, UART_FLAG_TXE)) {
|
|
|
|
return true; // tx register is empty
|
|
|
|
}
|
|
|
|
if (HAL_GetTick() - start >= timeout) {
|
|
|
|
return false; // timeout
|
|
|
|
}
|
|
|
|
__WFI();
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
STATIC HAL_StatusTypeDef uart_tx_data(pyb_uart_obj_t *self, uint8_t *data, uint16_t len) {
|
2016-03-25 10:20:12 +00:00
|
|
|
if (self->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) {
|
|
|
|
// CTS can hold off transmission for an arbitrarily long time. Apply
|
|
|
|
// the overall timeout rather than the character timeout.
|
|
|
|
return HAL_UART_Transmit(&self->uart, data, len, self->timeout);
|
|
|
|
}
|
2015-11-30 17:29:52 +00:00
|
|
|
// The timeout specified here is for waiting for the TX data register to
|
|
|
|
// become empty (ie between chars), as well as for the final char to be
|
|
|
|
// completely transferred. The default value for timeout_char is long
|
|
|
|
// enough for 1 char, but we need to double it to wait for the last char
|
|
|
|
// to be transferred to the data register, and then to be transmitted.
|
|
|
|
return HAL_UART_Transmit(&self->uart, data, len, 2 * self->timeout_char);
|
|
|
|
}
|
|
|
|
|
2014-10-11 17:57:10 +01:00
|
|
|
STATIC void uart_tx_char(pyb_uart_obj_t *uart_obj, int c) {
|
2014-03-13 01:06:26 +00:00
|
|
|
uint8_t ch = c;
|
2015-11-30 17:29:52 +00:00
|
|
|
uart_tx_data(uart_obj, &ch, 1);
|
2014-03-13 01:06:26 +00:00
|
|
|
}
|
|
|
|
|
2014-04-21 12:03:09 +01:00
|
|
|
void uart_tx_strn(pyb_uart_obj_t *uart_obj, const char *str, uint len) {
|
2015-11-30 17:29:52 +00:00
|
|
|
uart_tx_data(uart_obj, (uint8_t*)str, len);
|
2014-03-13 01:06:26 +00:00
|
|
|
}
|
|
|
|
|
2014-04-21 12:03:09 +01:00
|
|
|
void uart_tx_strn_cooked(pyb_uart_obj_t *uart_obj, const char *str, uint len) {
|
2014-03-13 01:06:26 +00:00
|
|
|
for (const char *top = str + len; str < top; str++) {
|
|
|
|
if (*str == '\n') {
|
2014-04-21 12:03:09 +01:00
|
|
|
uart_tx_char(uart_obj, '\r');
|
2014-03-13 01:06:26 +00:00
|
|
|
}
|
2014-04-21 12:03:09 +01:00
|
|
|
uart_tx_char(uart_obj, *str);
|
2014-03-13 01:06:26 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-10-11 17:57:10 +01:00
|
|
|
// this IRQ handler is set up to handle RXNE interrupts only
|
|
|
|
void uart_irq_handler(mp_uint_t uart_id) {
|
|
|
|
// get the uart object
|
2015-01-07 23:38:50 +00:00
|
|
|
pyb_uart_obj_t *self = MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1];
|
2014-10-11 17:57:10 +01:00
|
|
|
|
|
|
|
if (self == NULL) {
|
|
|
|
// UART object has not been set, so we can't do anything, not
|
|
|
|
// even disable the IRQ. This should never happen.
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (__HAL_UART_GET_FLAG(&self->uart, UART_FLAG_RXNE) != RESET) {
|
|
|
|
if (self->read_buf_len != 0) {
|
|
|
|
uint16_t next_head = (self->read_buf_head + 1) % self->read_buf_len;
|
|
|
|
if (next_head != self->read_buf_tail) {
|
2016-03-25 10:20:12 +00:00
|
|
|
// only read data if room in buf
|
2016-04-17 11:59:33 +01:00
|
|
|
#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4)
|
2016-03-25 10:20:12 +00:00
|
|
|
int data = self->uart.Instance->RDR; // clears UART_FLAG_RXNE
|
|
|
|
#else
|
|
|
|
int data = self->uart.Instance->DR; // clears UART_FLAG_RXNE
|
|
|
|
#endif
|
|
|
|
data &= self->char_mask;
|
2014-10-11 17:57:10 +01:00
|
|
|
if (self->char_width == CHAR_WIDTH_9BIT) {
|
|
|
|
((uint16_t*)self->read_buf)[self->read_buf_head] = data;
|
|
|
|
} else {
|
|
|
|
self->read_buf[self->read_buf_head] = data;
|
|
|
|
}
|
|
|
|
self->read_buf_head = next_head;
|
2016-03-25 10:20:12 +00:00
|
|
|
} else { // No room: leave char in buf, disable interrupt
|
|
|
|
__HAL_UART_DISABLE_IT(&self->uart, UART_IT_RXNE);
|
2014-10-11 17:57:10 +01:00
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-03-13 01:06:26 +00:00
|
|
|
/******************************************************************************/
|
|
|
|
/* Micro Python bindings */
|
|
|
|
|
2015-04-09 23:56:15 +01:00
|
|
|
STATIC void pyb_uart_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
|
2014-04-21 12:03:09 +01:00
|
|
|
pyb_uart_obj_t *self = self_in;
|
2014-04-21 01:14:14 +01:00
|
|
|
if (!self->is_enabled) {
|
2015-04-09 23:56:15 +01:00
|
|
|
mp_printf(print, "UART(%u)", self->uart_id);
|
2014-04-21 01:14:14 +01:00
|
|
|
} else {
|
2014-10-31 20:28:10 +00:00
|
|
|
mp_int_t bits = (self->uart.Init.WordLength == UART_WORDLENGTH_8B ? 8 : 9);
|
|
|
|
if (self->uart.Init.Parity != UART_PARITY_NONE) {
|
|
|
|
bits -= 1;
|
|
|
|
}
|
2015-04-09 23:56:15 +01:00
|
|
|
mp_printf(print, "UART(%u, baudrate=%u, bits=%u, parity=",
|
2014-10-31 20:28:10 +00:00
|
|
|
self->uart_id, self->uart.Init.BaudRate, bits);
|
2014-04-21 01:14:14 +01:00
|
|
|
if (self->uart.Init.Parity == UART_PARITY_NONE) {
|
2015-04-09 23:56:15 +01:00
|
|
|
mp_print_str(print, "None");
|
2014-04-21 01:14:14 +01:00
|
|
|
} else {
|
2015-04-09 23:56:15 +01:00
|
|
|
mp_printf(print, "%u", self->uart.Init.Parity == UART_PARITY_EVEN ? 0 : 1);
|
2014-04-21 01:14:14 +01:00
|
|
|
}
|
2016-03-25 10:20:12 +00:00
|
|
|
if (self->uart.Init.HwFlowCtl) {
|
|
|
|
mp_printf(print, ", flow=");
|
|
|
|
if (self->uart.Init.HwFlowCtl & UART_HWCONTROL_RTS) {
|
|
|
|
mp_printf(print, "RTS%s", self->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS ? "|" : "");
|
|
|
|
}
|
|
|
|
if (self->uart.Init.HwFlowCtl & UART_HWCONTROL_CTS) {
|
|
|
|
mp_printf(print, "CTS");
|
|
|
|
}
|
|
|
|
}
|
2015-04-09 23:56:15 +01:00
|
|
|
mp_printf(print, ", stop=%u, timeout=%u, timeout_char=%u, read_buf_len=%u)",
|
2014-10-11 17:57:10 +01:00
|
|
|
self->uart.Init.StopBits == UART_STOPBITS_1 ? 1 : 2,
|
2015-11-27 18:30:46 +00:00
|
|
|
self->timeout, self->timeout_char,
|
|
|
|
self->read_buf_len == 0 ? 0 : self->read_buf_len - 1); // -1 to adjust for usable length of buffer
|
2014-04-21 01:14:14 +01:00
|
|
|
}
|
2014-03-25 23:40:54 +00:00
|
|
|
}
|
|
|
|
|
2016-03-25 10:20:12 +00:00
|
|
|
/// \method init(baudrate, bits=8, parity=None, stop=1, *, timeout=1000, timeout_char=0, flow=0, read_buf_len=64)
|
2014-04-29 22:55:34 +01:00
|
|
|
///
|
2014-10-02 17:27:13 +01:00
|
|
|
/// Initialise the UART bus with the given parameters:
|
2014-04-29 22:55:34 +01:00
|
|
|
///
|
|
|
|
/// - `baudrate` is the clock rate.
|
2014-10-31 20:28:10 +00:00
|
|
|
/// - `bits` is the number of bits per byte, 7, 8 or 9.
|
2014-04-29 22:55:34 +01:00
|
|
|
/// - `parity` is the parity, `None`, 0 (even) or 1 (odd).
|
2014-10-11 17:57:10 +01:00
|
|
|
/// - `stop` is the number of stop bits, 1 or 2.
|
|
|
|
/// - `timeout` is the timeout in milliseconds to wait for the first character.
|
|
|
|
/// - `timeout_char` is the timeout in milliseconds to wait between characters.
|
2016-03-25 10:20:12 +00:00
|
|
|
/// - `flow` is RTS | CTS where RTS == 256, CTS == 512
|
2014-10-11 17:57:10 +01:00
|
|
|
/// - `read_buf_len` is the character length of the read buffer (0 to disable).
|
|
|
|
STATIC mp_obj_t pyb_uart_init_helper(pyb_uart_obj_t *self, mp_uint_t n_args, const mp_obj_t *pos_args, mp_map_t *kw_args) {
|
|
|
|
static const mp_arg_t allowed_args[] = {
|
|
|
|
{ MP_QSTR_baudrate, MP_ARG_REQUIRED | MP_ARG_INT, {.u_int = 9600} },
|
|
|
|
{ MP_QSTR_bits, MP_ARG_INT, {.u_int = 8} },
|
|
|
|
{ MP_QSTR_parity, MP_ARG_OBJ, {.u_obj = mp_const_none} },
|
|
|
|
{ MP_QSTR_stop, MP_ARG_INT, {.u_int = 1} },
|
2014-10-31 00:40:57 +00:00
|
|
|
{ MP_QSTR_flow, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = UART_HWCONTROL_NONE} },
|
2014-10-11 17:57:10 +01:00
|
|
|
{ MP_QSTR_timeout, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 1000} },
|
|
|
|
{ MP_QSTR_timeout_char, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 0} },
|
|
|
|
{ MP_QSTR_read_buf_len, MP_ARG_KW_ONLY | MP_ARG_INT, {.u_int = 64} },
|
|
|
|
};
|
2014-04-21 01:14:14 +01:00
|
|
|
|
|
|
|
// parse args
|
2015-12-12 15:55:51 +00:00
|
|
|
struct {
|
|
|
|
mp_arg_val_t baudrate, bits, parity, stop, flow, timeout, timeout_char, read_buf_len;
|
|
|
|
} args;
|
|
|
|
mp_arg_parse_all(n_args, pos_args, kw_args,
|
|
|
|
MP_ARRAY_SIZE(allowed_args), allowed_args, (mp_arg_val_t*)&args);
|
2014-04-21 01:14:14 +01:00
|
|
|
|
2014-04-21 12:03:09 +01:00
|
|
|
// set the UART configuration values
|
2014-04-21 01:14:14 +01:00
|
|
|
memset(&self->uart, 0, sizeof(self->uart));
|
|
|
|
UART_InitTypeDef *init = &self->uart.Init;
|
2014-10-31 20:28:10 +00:00
|
|
|
|
|
|
|
// baudrate
|
2015-12-12 15:55:51 +00:00
|
|
|
init->BaudRate = args.baudrate.u_int;
|
2014-10-31 20:28:10 +00:00
|
|
|
|
|
|
|
// parity
|
2015-12-12 15:55:51 +00:00
|
|
|
mp_int_t bits = args.bits.u_int;
|
|
|
|
if (args.parity.u_obj == mp_const_none) {
|
2014-04-21 01:14:14 +01:00
|
|
|
init->Parity = UART_PARITY_NONE;
|
|
|
|
} else {
|
2015-12-12 15:55:51 +00:00
|
|
|
mp_int_t parity = mp_obj_get_int(args.parity.u_obj);
|
2014-04-21 01:14:14 +01:00
|
|
|
init->Parity = (parity & 1) ? UART_PARITY_ODD : UART_PARITY_EVEN;
|
2014-10-31 20:28:10 +00:00
|
|
|
bits += 1; // STs convention has bits including parity
|
2014-04-21 01:14:14 +01:00
|
|
|
}
|
2014-10-31 20:28:10 +00:00
|
|
|
|
|
|
|
// number of bits
|
|
|
|
if (bits == 8) {
|
|
|
|
init->WordLength = UART_WORDLENGTH_8B;
|
|
|
|
} else if (bits == 9) {
|
|
|
|
init->WordLength = UART_WORDLENGTH_9B;
|
|
|
|
} else {
|
|
|
|
nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "unsupported combination of bits and parity"));
|
|
|
|
}
|
|
|
|
|
|
|
|
// stop bits
|
2015-12-12 15:55:51 +00:00
|
|
|
switch (args.stop.u_int) {
|
2014-10-11 17:57:10 +01:00
|
|
|
case 1: init->StopBits = UART_STOPBITS_1; break;
|
|
|
|
default: init->StopBits = UART_STOPBITS_2; break;
|
|
|
|
}
|
2014-10-31 20:28:10 +00:00
|
|
|
|
|
|
|
// flow control
|
2015-12-12 15:55:51 +00:00
|
|
|
init->HwFlowCtl = args.flow.u_int;
|
2014-10-31 20:28:10 +00:00
|
|
|
|
|
|
|
// extra config (not yet configurable)
|
|
|
|
init->Mode = UART_MODE_TX_RX;
|
2014-04-21 01:14:14 +01:00
|
|
|
init->OverSampling = UART_OVERSAMPLING_16;
|
|
|
|
|
2014-04-21 12:03:09 +01:00
|
|
|
// init UART (if it fails, it's because the port doesn't exist)
|
|
|
|
if (!uart_init2(self)) {
|
2014-10-11 17:57:10 +01:00
|
|
|
nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART(%d) does not exist", self->uart_id));
|
|
|
|
}
|
|
|
|
|
2015-11-30 17:29:52 +00:00
|
|
|
// set timeout
|
2015-12-12 15:55:51 +00:00
|
|
|
self->timeout = args.timeout.u_int;
|
2015-11-30 17:29:52 +00:00
|
|
|
|
|
|
|
// set timeout_char
|
|
|
|
// make sure it is at least as long as a whole character (13 bits to be safe)
|
2015-12-12 15:55:51 +00:00
|
|
|
self->timeout_char = args.timeout_char.u_int;
|
2015-11-30 17:29:52 +00:00
|
|
|
uint32_t min_timeout_char = 13000 / init->BaudRate + 1;
|
|
|
|
if (self->timeout_char < min_timeout_char) {
|
|
|
|
self->timeout_char = min_timeout_char;
|
|
|
|
}
|
2014-10-11 17:57:10 +01:00
|
|
|
|
|
|
|
// setup the read buffer
|
|
|
|
m_del(byte, self->read_buf, self->read_buf_len << self->char_width);
|
|
|
|
if (init->WordLength == UART_WORDLENGTH_9B && init->Parity == UART_PARITY_NONE) {
|
2014-10-31 20:28:10 +00:00
|
|
|
self->char_mask = 0x1ff;
|
2014-10-11 17:57:10 +01:00
|
|
|
self->char_width = CHAR_WIDTH_9BIT;
|
|
|
|
} else {
|
2014-10-31 20:28:10 +00:00
|
|
|
if (init->WordLength == UART_WORDLENGTH_9B || init->Parity == UART_PARITY_NONE) {
|
|
|
|
self->char_mask = 0xff;
|
|
|
|
} else {
|
|
|
|
self->char_mask = 0x7f;
|
|
|
|
}
|
2014-10-11 17:57:10 +01:00
|
|
|
self->char_width = CHAR_WIDTH_8BIT;
|
|
|
|
}
|
|
|
|
self->read_buf_head = 0;
|
|
|
|
self->read_buf_tail = 0;
|
2015-12-12 15:55:51 +00:00
|
|
|
if (args.read_buf_len.u_int <= 0) {
|
2014-10-11 17:57:10 +01:00
|
|
|
// no read buffer
|
|
|
|
self->read_buf_len = 0;
|
|
|
|
self->read_buf = NULL;
|
|
|
|
HAL_NVIC_DisableIRQ(self->irqn);
|
|
|
|
__HAL_UART_DISABLE_IT(&self->uart, UART_IT_RXNE);
|
|
|
|
} else {
|
|
|
|
// read buffer using interrupts
|
2015-12-12 15:55:51 +00:00
|
|
|
self->read_buf_len = args.read_buf_len.u_int + 1; // +1 to adjust for usable length of buffer
|
2015-11-27 18:30:46 +00:00
|
|
|
self->read_buf = m_new(byte, self->read_buf_len << self->char_width);
|
2014-10-11 17:57:10 +01:00
|
|
|
__HAL_UART_ENABLE_IT(&self->uart, UART_IT_RXNE);
|
2015-10-31 17:44:20 +00:00
|
|
|
HAL_NVIC_SetPriority(self->irqn, IRQ_PRI_UART, IRQ_SUBPRI_UART);
|
2014-10-11 17:57:10 +01:00
|
|
|
HAL_NVIC_EnableIRQ(self->irqn);
|
2014-03-25 23:40:54 +00:00
|
|
|
}
|
|
|
|
|
2015-02-22 00:26:49 +00:00
|
|
|
// compute actual baudrate that was configured
|
|
|
|
// (this formula assumes UART_OVERSAMPLING_16)
|
|
|
|
uint32_t actual_baudrate;
|
2016-04-17 11:59:33 +01:00
|
|
|
if (self->uart.Instance == USART1
|
|
|
|
#if defined(USART6)
|
|
|
|
|| self->uart.Instance == USART6
|
|
|
|
#endif
|
|
|
|
) {
|
2015-02-22 00:26:49 +00:00
|
|
|
actual_baudrate = HAL_RCC_GetPCLK2Freq();
|
|
|
|
} else {
|
|
|
|
actual_baudrate = HAL_RCC_GetPCLK1Freq();
|
|
|
|
}
|
|
|
|
actual_baudrate /= self->uart.Instance->BRR;
|
|
|
|
|
|
|
|
// check we could set the baudrate within 5%
|
|
|
|
uint32_t baudrate_diff;
|
|
|
|
if (actual_baudrate > init->BaudRate) {
|
|
|
|
baudrate_diff = actual_baudrate - init->BaudRate;
|
|
|
|
} else {
|
|
|
|
baudrate_diff = init->BaudRate - actual_baudrate;
|
|
|
|
}
|
|
|
|
init->BaudRate = actual_baudrate; // remember actual baudrate for printing
|
|
|
|
if (20 * baudrate_diff > init->BaudRate) {
|
|
|
|
nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "set baudrate %d is not within 5%% of desired value", actual_baudrate));
|
|
|
|
}
|
|
|
|
|
2014-04-21 01:14:14 +01:00
|
|
|
return mp_const_none;
|
|
|
|
}
|
|
|
|
|
2014-04-29 22:55:34 +01:00
|
|
|
/// \classmethod \constructor(bus, ...)
|
|
|
|
///
|
|
|
|
/// Construct a UART object on the given bus. `bus` can be 1-6, or 'XA', 'XB', 'YA', or 'YB'.
|
|
|
|
/// With no additional parameters, the UART object is created but not
|
|
|
|
/// initialised (it has the settings from the last initialisation of
|
|
|
|
/// the bus, if any). If extra arguments are given, the bus is initialised.
|
|
|
|
/// See `init` for parameters of initialisation.
|
2014-05-04 14:28:11 +01:00
|
|
|
///
|
|
|
|
/// The physical pins of the UART busses are:
|
|
|
|
///
|
|
|
|
/// - `UART(4)` is on `XA`: `(TX, RX) = (X1, X2) = (PA0, PA1)`
|
|
|
|
/// - `UART(1)` is on `XB`: `(TX, RX) = (X9, X10) = (PB6, PB7)`
|
|
|
|
/// - `UART(6)` is on `YA`: `(TX, RX) = (Y1, Y2) = (PC6, PC7)`
|
|
|
|
/// - `UART(3)` is on `YB`: `(TX, RX) = (Y9, Y10) = (PB10, PB11)`
|
|
|
|
/// - `UART(2)` is on: `(TX, RX) = (X3, X4) = (PA2, PA3)`
|
2016-01-03 15:55:55 +00:00
|
|
|
STATIC mp_obj_t pyb_uart_make_new(const mp_obj_type_t *type, mp_uint_t n_args, mp_uint_t n_kw, const mp_obj_t *args) {
|
2014-04-21 01:14:14 +01:00
|
|
|
// check arguments
|
|
|
|
mp_arg_check_num(n_args, n_kw, 1, MP_OBJ_FUN_ARGS_MAX, true);
|
|
|
|
|
2014-04-14 01:45:58 +01:00
|
|
|
// work out port
|
2014-10-11 17:57:10 +01:00
|
|
|
int uart_id = 0;
|
2014-04-14 01:45:58 +01:00
|
|
|
if (MP_OBJ_IS_STR(args[0])) {
|
|
|
|
const char *port = mp_obj_str_get_str(args[0]);
|
2014-04-15 11:52:47 +01:00
|
|
|
if (0) {
|
2015-05-27 16:51:04 +01:00
|
|
|
#ifdef MICROPY_HW_UART1_NAME
|
|
|
|
} else if (strcmp(port, MICROPY_HW_UART1_NAME) == 0) {
|
|
|
|
uart_id = PYB_UART_1;
|
|
|
|
#endif
|
|
|
|
#ifdef MICROPY_HW_UART2_NAME
|
|
|
|
} else if (strcmp(port, MICROPY_HW_UART2_NAME) == 0) {
|
|
|
|
uart_id = PYB_UART_2;
|
|
|
|
#endif
|
|
|
|
#ifdef MICROPY_HW_UART3_NAME
|
|
|
|
} else if (strcmp(port, MICROPY_HW_UART3_NAME) == 0) {
|
|
|
|
uart_id = PYB_UART_3;
|
|
|
|
#endif
|
|
|
|
#ifdef MICROPY_HW_UART4_NAME
|
|
|
|
} else if (strcmp(port, MICROPY_HW_UART4_NAME) == 0) {
|
|
|
|
uart_id = PYB_UART_4;
|
|
|
|
#endif
|
|
|
|
#ifdef MICROPY_HW_UART5_NAME
|
|
|
|
} else if (strcmp(port, MICROPY_HW_UART5_NAME) == 0) {
|
|
|
|
uart_id = PYB_UART_5;
|
|
|
|
#endif
|
|
|
|
#ifdef MICROPY_HW_UART6_NAME
|
|
|
|
} else if (strcmp(port, MICROPY_HW_UART6_NAME) == 0) {
|
|
|
|
uart_id = PYB_UART_6;
|
|
|
|
#endif
|
2014-04-14 01:45:58 +01:00
|
|
|
} else {
|
2014-10-11 17:57:10 +01:00
|
|
|
nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART(%s) does not exist", port));
|
2014-04-14 01:45:58 +01:00
|
|
|
}
|
2014-04-15 11:52:47 +01:00
|
|
|
} else {
|
2014-10-11 17:57:10 +01:00
|
|
|
uart_id = mp_obj_get_int(args[0]);
|
2015-01-07 23:38:50 +00:00
|
|
|
if (uart_id < 1 || uart_id > MP_ARRAY_SIZE(MP_STATE_PORT(pyb_uart_obj_all))) {
|
2014-10-11 17:57:10 +01:00
|
|
|
nlr_raise(mp_obj_new_exception_msg_varg(&mp_type_ValueError, "UART(%d) does not exist", uart_id));
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
pyb_uart_obj_t *self;
|
2015-01-07 23:38:50 +00:00
|
|
|
if (MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1] == NULL) {
|
2014-10-11 17:57:10 +01:00
|
|
|
// create new UART object
|
|
|
|
self = m_new0(pyb_uart_obj_t, 1);
|
|
|
|
self->base.type = &pyb_uart_type;
|
|
|
|
self->uart_id = uart_id;
|
2015-01-07 23:38:50 +00:00
|
|
|
MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1] = self;
|
2014-10-11 17:57:10 +01:00
|
|
|
} else {
|
|
|
|
// reference existing UART object
|
2015-01-07 23:38:50 +00:00
|
|
|
self = MP_STATE_PORT(pyb_uart_obj_all)[uart_id - 1];
|
2014-04-14 01:45:58 +01:00
|
|
|
}
|
|
|
|
|
2014-04-21 01:14:14 +01:00
|
|
|
if (n_args > 1 || n_kw > 0) {
|
|
|
|
// start the peripheral
|
|
|
|
mp_map_t kw_args;
|
|
|
|
mp_map_init_fixed_table(&kw_args, n_kw, args + n_args);
|
2014-10-11 17:57:10 +01:00
|
|
|
pyb_uart_init_helper(self, n_args - 1, args + 1, &kw_args);
|
2014-04-14 01:45:58 +01:00
|
|
|
}
|
|
|
|
|
2014-10-11 17:57:10 +01:00
|
|
|
return self;
|
2014-03-25 23:40:54 +00:00
|
|
|
}
|
|
|
|
|
2014-08-30 00:35:11 +01:00
|
|
|
STATIC mp_obj_t pyb_uart_init(mp_uint_t n_args, const mp_obj_t *args, mp_map_t *kw_args) {
|
2014-04-21 12:03:09 +01:00
|
|
|
return pyb_uart_init_helper(args[0], n_args - 1, args + 1, kw_args);
|
2014-04-21 01:14:14 +01:00
|
|
|
}
|
2014-04-21 12:03:09 +01:00
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_KW(pyb_uart_init_obj, 1, pyb_uart_init);
|
2014-04-21 01:14:14 +01:00
|
|
|
|
2014-04-29 22:55:34 +01:00
|
|
|
/// \method deinit()
|
|
|
|
/// Turn off the UART bus.
|
2014-04-21 12:03:09 +01:00
|
|
|
STATIC mp_obj_t pyb_uart_deinit(mp_obj_t self_in) {
|
|
|
|
pyb_uart_obj_t *self = self_in;
|
2014-10-11 17:57:10 +01:00
|
|
|
self->is_enabled = false;
|
|
|
|
UART_HandleTypeDef *uart = &self->uart;
|
|
|
|
HAL_UART_DeInit(uart);
|
|
|
|
if (uart->Instance == USART1) {
|
|
|
|
HAL_NVIC_DisableIRQ(USART1_IRQn);
|
|
|
|
__USART1_FORCE_RESET();
|
|
|
|
__USART1_RELEASE_RESET();
|
|
|
|
__USART1_CLK_DISABLE();
|
|
|
|
} else if (uart->Instance == USART2) {
|
|
|
|
HAL_NVIC_DisableIRQ(USART2_IRQn);
|
|
|
|
__USART2_FORCE_RESET();
|
|
|
|
__USART2_RELEASE_RESET();
|
|
|
|
__USART2_CLK_DISABLE();
|
2015-04-18 15:59:08 +01:00
|
|
|
#if defined(USART3)
|
2014-10-11 17:57:10 +01:00
|
|
|
} else if (uart->Instance == USART3) {
|
|
|
|
HAL_NVIC_DisableIRQ(USART3_IRQn);
|
|
|
|
__USART3_FORCE_RESET();
|
|
|
|
__USART3_RELEASE_RESET();
|
|
|
|
__USART3_CLK_DISABLE();
|
2015-04-18 15:59:08 +01:00
|
|
|
#endif
|
|
|
|
#if defined(UART4)
|
2014-10-11 17:57:10 +01:00
|
|
|
} else if (uart->Instance == UART4) {
|
|
|
|
HAL_NVIC_DisableIRQ(UART4_IRQn);
|
|
|
|
__UART4_FORCE_RESET();
|
|
|
|
__UART4_RELEASE_RESET();
|
|
|
|
__UART4_CLK_DISABLE();
|
2015-04-18 15:59:08 +01:00
|
|
|
#endif
|
2015-05-31 23:37:37 +01:00
|
|
|
#if defined(UART5)
|
|
|
|
} else if (uart->Instance == UART5) {
|
|
|
|
HAL_NVIC_DisableIRQ(UART5_IRQn);
|
|
|
|
__UART5_FORCE_RESET();
|
|
|
|
__UART5_RELEASE_RESET();
|
|
|
|
__UART5_CLK_DISABLE();
|
|
|
|
#endif
|
2016-04-17 11:59:33 +01:00
|
|
|
#if defined(UART6)
|
2014-10-11 17:57:10 +01:00
|
|
|
} else if (uart->Instance == USART6) {
|
|
|
|
HAL_NVIC_DisableIRQ(USART6_IRQn);
|
|
|
|
__USART6_FORCE_RESET();
|
|
|
|
__USART6_RELEASE_RESET();
|
|
|
|
__USART6_CLK_DISABLE();
|
2016-04-17 11:59:33 +01:00
|
|
|
#endif
|
2014-10-11 17:57:10 +01:00
|
|
|
}
|
2014-04-21 01:14:14 +01:00
|
|
|
return mp_const_none;
|
|
|
|
}
|
2014-04-21 12:03:09 +01:00
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_deinit_obj, pyb_uart_deinit);
|
2014-04-21 01:14:14 +01:00
|
|
|
|
2014-04-29 22:55:34 +01:00
|
|
|
/// \method any()
|
|
|
|
/// Return `True` if any characters waiting, else `False`.
|
2014-04-21 12:03:09 +01:00
|
|
|
STATIC mp_obj_t pyb_uart_any(mp_obj_t self_in) {
|
|
|
|
pyb_uart_obj_t *self = self_in;
|
2015-11-27 15:31:59 +00:00
|
|
|
return MP_OBJ_NEW_SMALL_INT(uart_rx_any(self));
|
2014-03-13 01:06:26 +00:00
|
|
|
}
|
2014-04-21 12:03:09 +01:00
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_any_obj, pyb_uart_any);
|
2014-03-13 01:06:26 +00:00
|
|
|
|
2014-10-11 17:57:10 +01:00
|
|
|
/// \method writechar(char)
|
|
|
|
/// Write a single character on the bus. `char` is an integer to write.
|
2014-04-29 22:55:34 +01:00
|
|
|
/// Return value: `None`.
|
2014-10-11 17:57:10 +01:00
|
|
|
STATIC mp_obj_t pyb_uart_writechar(mp_obj_t self_in, mp_obj_t char_in) {
|
|
|
|
pyb_uart_obj_t *self = self_in;
|
2014-04-21 01:14:14 +01:00
|
|
|
|
2014-10-11 17:57:10 +01:00
|
|
|
// get the character to write (might be 9 bits)
|
|
|
|
uint16_t data = mp_obj_get_int(char_in);
|
2014-04-21 01:14:14 +01:00
|
|
|
|
2015-11-30 17:29:52 +00:00
|
|
|
// write the character
|
|
|
|
HAL_StatusTypeDef status;
|
|
|
|
if (uart_tx_wait(self, self->timeout)) {
|
|
|
|
status = uart_tx_data(self, (uint8_t*)&data, 1);
|
|
|
|
} else {
|
|
|
|
status = HAL_TIMEOUT;
|
|
|
|
}
|
2014-04-21 01:14:14 +01:00
|
|
|
|
|
|
|
if (status != HAL_OK) {
|
2014-10-23 14:25:32 +01:00
|
|
|
mp_hal_raise(status);
|
2014-03-13 01:06:26 +00:00
|
|
|
}
|
2014-04-21 01:14:14 +01:00
|
|
|
|
2014-03-13 01:06:26 +00:00
|
|
|
return mp_const_none;
|
|
|
|
}
|
2014-10-11 17:57:10 +01:00
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_2(pyb_uart_writechar_obj, pyb_uart_writechar);
|
2014-04-21 01:14:14 +01:00
|
|
|
|
2014-10-11 17:57:10 +01:00
|
|
|
/// \method readchar()
|
|
|
|
/// Receive a single character on the bus.
|
|
|
|
/// Return value: The character read, as an integer. Returns -1 on timeout.
|
|
|
|
STATIC mp_obj_t pyb_uart_readchar(mp_obj_t self_in) {
|
|
|
|
pyb_uart_obj_t *self = self_in;
|
|
|
|
if (uart_rx_wait(self, self->timeout)) {
|
|
|
|
return MP_OBJ_NEW_SMALL_INT(uart_rx_char(self));
|
|
|
|
} else {
|
|
|
|
// return -1 on timeout
|
|
|
|
return MP_OBJ_NEW_SMALL_INT(-1);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_readchar_obj, pyb_uart_readchar);
|
|
|
|
|
2015-02-13 19:04:24 +00:00
|
|
|
// uart.sendbreak()
|
|
|
|
STATIC mp_obj_t pyb_uart_sendbreak(mp_obj_t self_in) {
|
|
|
|
pyb_uart_obj_t *self = self_in;
|
2016-04-17 11:59:33 +01:00
|
|
|
#if defined(MCU_SERIES_F7) || defined(MCU_SERIES_L4)
|
2015-07-28 19:13:33 +01:00
|
|
|
self->uart.Instance->RQR = USART_RQR_SBKRQ; // write-only register
|
|
|
|
#else
|
2015-02-13 19:04:24 +00:00
|
|
|
self->uart.Instance->CR1 |= USART_CR1_SBK;
|
2015-07-28 19:13:33 +01:00
|
|
|
#endif
|
2015-02-13 19:04:24 +00:00
|
|
|
return mp_const_none;
|
|
|
|
}
|
|
|
|
STATIC MP_DEFINE_CONST_FUN_OBJ_1(pyb_uart_sendbreak_obj, pyb_uart_sendbreak);
|
|
|
|
|
2014-04-21 12:03:09 +01:00
|
|
|
STATIC const mp_map_elem_t pyb_uart_locals_dict_table[] = {
|
2014-04-21 01:14:14 +01:00
|
|
|
// instance methods
|
2014-10-11 17:57:10 +01:00
|
|
|
|
2014-04-21 12:03:09 +01:00
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_init), (mp_obj_t)&pyb_uart_init_obj },
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_deinit), (mp_obj_t)&pyb_uart_deinit_obj },
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_any), (mp_obj_t)&pyb_uart_any_obj },
|
2014-10-11 17:57:10 +01:00
|
|
|
|
|
|
|
/// \method read([nbytes])
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_read), (mp_obj_t)&mp_stream_read_obj },
|
|
|
|
/// \method readline()
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_readline), (mp_obj_t)&mp_stream_unbuffered_readline_obj},
|
2014-10-24 12:19:01 +01:00
|
|
|
/// \method readinto(buf[, nbytes])
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_readinto), (mp_obj_t)&mp_stream_readinto_obj },
|
2014-10-11 17:57:10 +01:00
|
|
|
/// \method write(buf)
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_write), (mp_obj_t)&mp_stream_write_obj },
|
|
|
|
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_writechar), (mp_obj_t)&pyb_uart_writechar_obj },
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_readchar), (mp_obj_t)&pyb_uart_readchar_obj },
|
2015-02-13 19:04:24 +00:00
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_sendbreak), (mp_obj_t)&pyb_uart_sendbreak_obj },
|
2014-10-31 00:40:57 +00:00
|
|
|
|
|
|
|
// class constants
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_RTS), MP_OBJ_NEW_SMALL_INT(UART_HWCONTROL_RTS) },
|
|
|
|
{ MP_OBJ_NEW_QSTR(MP_QSTR_CTS), MP_OBJ_NEW_SMALL_INT(UART_HWCONTROL_CTS) },
|
2014-03-13 01:06:26 +00:00
|
|
|
};
|
|
|
|
|
2014-04-21 12:03:09 +01:00
|
|
|
STATIC MP_DEFINE_CONST_DICT(pyb_uart_locals_dict, pyb_uart_locals_dict_table);
|
2014-03-26 21:47:19 +00:00
|
|
|
|
2014-10-11 17:57:10 +01:00
|
|
|
STATIC mp_uint_t pyb_uart_read(mp_obj_t self_in, void *buf_in, mp_uint_t size, int *errcode) {
|
|
|
|
pyb_uart_obj_t *self = self_in;
|
|
|
|
byte *buf = buf_in;
|
|
|
|
|
|
|
|
// check that size is a multiple of character width
|
|
|
|
if (size & self->char_width) {
|
2016-05-10 23:22:54 +01:00
|
|
|
*errcode = MP_EIO;
|
2014-10-11 17:57:10 +01:00
|
|
|
return MP_STREAM_ERROR;
|
|
|
|
}
|
|
|
|
|
|
|
|
// convert byte size to char size
|
|
|
|
size >>= self->char_width;
|
|
|
|
|
|
|
|
// make sure we want at least 1 char
|
|
|
|
if (size == 0) {
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
// wait for first char to become available
|
|
|
|
if (!uart_rx_wait(self, self->timeout)) {
|
2015-10-19 22:27:07 +01:00
|
|
|
// return EAGAIN error to indicate non-blocking (then read() method returns None)
|
2016-05-10 23:22:54 +01:00
|
|
|
*errcode = MP_EAGAIN;
|
2015-10-19 22:27:07 +01:00
|
|
|
return MP_STREAM_ERROR;
|
2014-10-11 17:57:10 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
// read the data
|
|
|
|
byte *orig_buf = buf;
|
|
|
|
for (;;) {
|
|
|
|
int data = uart_rx_char(self);
|
|
|
|
if (self->char_width == CHAR_WIDTH_9BIT) {
|
|
|
|
*(uint16_t*)buf = data;
|
|
|
|
buf += 2;
|
|
|
|
} else {
|
|
|
|
*buf++ = data;
|
|
|
|
}
|
|
|
|
if (--size == 0 || !uart_rx_wait(self, self->timeout_char)) {
|
|
|
|
// return number of bytes read
|
|
|
|
return buf - orig_buf;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
STATIC mp_uint_t pyb_uart_write(mp_obj_t self_in, const void *buf_in, mp_uint_t size, int *errcode) {
|
|
|
|
pyb_uart_obj_t *self = self_in;
|
|
|
|
const byte *buf = buf_in;
|
|
|
|
|
|
|
|
// check that size is a multiple of character width
|
|
|
|
if (size & self->char_width) {
|
2016-05-10 23:22:54 +01:00
|
|
|
*errcode = MP_EIO;
|
2014-10-11 17:57:10 +01:00
|
|
|
return MP_STREAM_ERROR;
|
|
|
|
}
|
|
|
|
|
2016-03-25 10:20:12 +00:00
|
|
|
// wait to be able to write the first character. EAGAIN causes write to return None
|
2015-11-30 17:29:52 +00:00
|
|
|
if (!uart_tx_wait(self, self->timeout)) {
|
2016-05-10 23:22:54 +01:00
|
|
|
*errcode = MP_EAGAIN;
|
2015-11-30 17:29:52 +00:00
|
|
|
return MP_STREAM_ERROR;
|
|
|
|
}
|
|
|
|
|
2014-10-11 17:57:10 +01:00
|
|
|
// write the data
|
2015-11-30 17:29:52 +00:00
|
|
|
HAL_StatusTypeDef status = uart_tx_data(self, (uint8_t*)buf, size >> self->char_width);
|
2014-10-11 17:57:10 +01:00
|
|
|
|
|
|
|
if (status == HAL_OK) {
|
|
|
|
// return number of bytes written
|
|
|
|
return size;
|
2016-03-25 10:20:12 +00:00
|
|
|
} else if (status == HAL_TIMEOUT) { // UART_WaitOnFlagUntilTimeout() disables RXNE interrupt on timeout
|
|
|
|
if (self->read_buf_len > 0) {
|
|
|
|
__HAL_UART_ENABLE_IT(&self->uart, UART_IT_RXNE); // re-enable RXNE
|
|
|
|
}
|
|
|
|
// return number of bytes written
|
|
|
|
if (self->char_width == CHAR_WIDTH_8BIT) {
|
|
|
|
return size - self->uart.TxXferCount - 1;
|
|
|
|
} else {
|
|
|
|
int written = self->uart.TxXferCount * 2;
|
|
|
|
return size - written - 2;
|
|
|
|
}
|
2014-10-11 17:57:10 +01:00
|
|
|
} else {
|
2014-10-23 14:25:32 +01:00
|
|
|
*errcode = mp_hal_status_to_errno_table[status];
|
2014-10-11 17:57:10 +01:00
|
|
|
return MP_STREAM_ERROR;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-11-16 22:16:14 +00:00
|
|
|
STATIC mp_uint_t pyb_uart_ioctl(mp_obj_t self_in, mp_uint_t request, mp_uint_t arg, int *errcode) {
|
2014-08-21 22:48:23 +01:00
|
|
|
pyb_uart_obj_t *self = self_in;
|
|
|
|
mp_uint_t ret;
|
2016-12-02 05:37:29 +00:00
|
|
|
if (request == MP_STREAM_POLL) {
|
2014-11-16 22:16:14 +00:00
|
|
|
mp_uint_t flags = arg;
|
2014-08-21 22:48:23 +01:00
|
|
|
ret = 0;
|
2016-12-02 05:37:29 +00:00
|
|
|
if ((flags & MP_STREAM_POLL_RD) && uart_rx_any(self)) {
|
|
|
|
ret |= MP_STREAM_POLL_RD;
|
2014-08-21 22:48:23 +01:00
|
|
|
}
|
2016-12-02 05:37:29 +00:00
|
|
|
if ((flags & MP_STREAM_POLL_WR) && __HAL_UART_GET_FLAG(&self->uart, UART_FLAG_TXE)) {
|
|
|
|
ret |= MP_STREAM_POLL_WR;
|
2014-08-21 22:48:23 +01:00
|
|
|
}
|
|
|
|
} else {
|
2016-05-10 23:22:54 +01:00
|
|
|
*errcode = MP_EINVAL;
|
2014-10-02 17:27:13 +01:00
|
|
|
ret = MP_STREAM_ERROR;
|
2014-08-21 22:48:23 +01:00
|
|
|
}
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
STATIC const mp_stream_p_t uart_stream_p = {
|
2014-10-11 17:57:10 +01:00
|
|
|
.read = pyb_uart_read,
|
|
|
|
.write = pyb_uart_write,
|
|
|
|
.ioctl = pyb_uart_ioctl,
|
2014-08-21 22:48:23 +01:00
|
|
|
.is_text = false,
|
|
|
|
};
|
|
|
|
|
2014-04-21 12:03:09 +01:00
|
|
|
const mp_obj_type_t pyb_uart_type = {
|
2014-03-13 01:06:26 +00:00
|
|
|
{ &mp_type_type },
|
2014-04-21 12:03:09 +01:00
|
|
|
.name = MP_QSTR_UART,
|
|
|
|
.print = pyb_uart_print,
|
|
|
|
.make_new = pyb_uart_make_new,
|
2014-10-11 17:57:10 +01:00
|
|
|
.getiter = mp_identity,
|
|
|
|
.iternext = mp_stream_unbuffered_iter,
|
2016-06-18 16:19:24 +01:00
|
|
|
.protocol = &uart_stream_p,
|
2014-04-21 12:03:09 +01:00
|
|
|
.locals_dict = (mp_obj_t)&pyb_uart_locals_dict,
|
2014-03-13 01:06:26 +00:00
|
|
|
};
|