2022-06-19 22:00:38 +01:00
|
|
|
# =============================================================================
|
|
|
|
# Parameter Configuration
|
|
|
|
# =============================================================================
|
|
|
|
|
2023-02-21 05:01:58 +00:00
|
|
|
# Select the board to build for:
|
|
|
|
ifdef BOARD_DIR
|
|
|
|
# Custom board path - remove trailing slash and get the final component of
|
|
|
|
# the path as the board name.
|
|
|
|
BOARD ?= $(notdir $(BOARD_DIR:/=))
|
|
|
|
else
|
|
|
|
# If not given on the command line, then default to TEENSY40.
|
2020-01-20 11:25:51 +00:00
|
|
|
BOARD ?= TEENSY40
|
|
|
|
BOARD_DIR ?= boards/$(BOARD)
|
2023-02-21 05:01:58 +00:00
|
|
|
endif
|
|
|
|
|
|
|
|
ifeq ($(wildcard $(BOARD_DIR)/.),)
|
|
|
|
$(error Invalid BOARD specified: $(BOARD_DIR))
|
|
|
|
endif
|
|
|
|
|
2020-01-20 11:25:51 +00:00
|
|
|
BUILD ?= build-$(BOARD)
|
2021-05-17 11:31:11 +01:00
|
|
|
PORT ?= /dev/ttyACM0
|
2020-01-20 11:25:51 +00:00
|
|
|
CROSS_COMPILE ?= arm-none-eabi-
|
2022-10-08 13:47:57 +01:00
|
|
|
GIT_SUBMODULES += lib/tinyusb lib/nxp_driver
|
2020-01-20 11:25:51 +00:00
|
|
|
|
2022-06-19 22:00:38 +01:00
|
|
|
# MicroPython feature configurations
|
|
|
|
MICROPY_VFS_LFS2 ?= 1
|
|
|
|
MICROPY_VFS_FAT ?= 1
|
2020-01-20 11:25:51 +00:00
|
|
|
|
2022-06-19 22:00:38 +01:00
|
|
|
# qstr definitions (must come before including py.mk)
|
2022-10-08 13:23:52 +01:00
|
|
|
QSTR_DEFS += qstrdefsport.h
|
2022-06-19 22:00:38 +01:00
|
|
|
QSTR_GLOBAL_DEPENDENCIES = $(BOARD_DIR)/mpconfigboard.h
|
2021-08-20 20:41:58 +01:00
|
|
|
|
2022-06-19 22:00:38 +01:00
|
|
|
# Generation scripts
|
|
|
|
MAKE_PINS = boards/make-pins.py
|
|
|
|
MAKE_FLEXRAM_LD = boards/make-flexram-config.py
|
2021-08-20 20:41:58 +01:00
|
|
|
|
2022-06-19 22:00:38 +01:00
|
|
|
# Include py make environment
|
|
|
|
include ../../py/mkenv.mk
|
2021-08-20 20:41:58 +01:00
|
|
|
|
2022-06-19 22:00:38 +01:00
|
|
|
# Include micropython configuration board makefile
|
|
|
|
include $(BOARD_DIR)/mpconfigboard.mk
|
2021-05-07 08:42:26 +01:00
|
|
|
|
2023-03-04 14:27:57 +00:00
|
|
|
# MicroPython feature configurations
|
|
|
|
MICROPY_ROM_TEXT_COMPRESSION ?= 1
|
|
|
|
|
2023-02-02 07:26:17 +00:00
|
|
|
# File containing description of content to be frozen into firmware.
|
|
|
|
FROZEN_MANIFEST ?= boards/manifest.py
|
|
|
|
|
2020-01-20 11:25:51 +00:00
|
|
|
# Include py core make definitions
|
|
|
|
include $(TOP)/py/py.mk
|
2022-06-17 17:11:30 +01:00
|
|
|
include $(TOP)/extmod/extmod.mk
|
2020-01-20 11:25:51 +00:00
|
|
|
|
2022-06-19 22:00:38 +01:00
|
|
|
# Set SDK directory based on MCU_SERIES
|
2020-01-20 11:25:51 +00:00
|
|
|
MCU_DIR = lib/nxp_driver/sdk/devices/$(MCU_SERIES)
|
2022-06-19 22:00:38 +01:00
|
|
|
|
|
|
|
# Select linker scripts based on MCU_SERIES
|
2021-08-20 20:41:58 +01:00
|
|
|
LD_FILES = boards/$(MCU_SERIES).ld boards/common.ld
|
2020-01-20 11:25:51 +00:00
|
|
|
|
2022-06-19 22:00:38 +01:00
|
|
|
# Parameter configurations for generation
|
2020-08-21 15:03:21 +01:00
|
|
|
AF_FILE = boards/$(MCU_SERIES)_af.csv
|
2022-06-19 22:00:38 +01:00
|
|
|
BOARD_PINS = $(BOARD_DIR)/pins.csv
|
2020-08-21 15:03:21 +01:00
|
|
|
PREFIX_FILE = boards/mimxrt_prefix.c
|
2022-06-19 22:00:38 +01:00
|
|
|
GEN_FLEXRAM_CONFIG_SRC = $(BUILD)/flexram_config.s
|
2020-08-21 15:03:21 +01:00
|
|
|
GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h
|
|
|
|
GEN_PINS_AF_PY = $(BUILD)/pins_af.py
|
2022-06-19 22:00:38 +01:00
|
|
|
GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
|
|
|
|
GEN_PINS_SRC = $(BUILD)/pins_gen.c
|
2020-08-21 15:03:21 +01:00
|
|
|
|
2022-06-19 22:00:38 +01:00
|
|
|
# =============================================================================
|
|
|
|
# Includes
|
|
|
|
# =============================================================================
|
2020-01-20 11:25:51 +00:00
|
|
|
|
|
|
|
INC += -I$(BOARD_DIR)
|
2021-08-01 10:20:39 +01:00
|
|
|
INC += -I$(BUILD)
|
|
|
|
INC += -I$(TOP)
|
2020-01-20 11:25:51 +00:00
|
|
|
INC += -I$(TOP)/$(MCU_DIR)
|
|
|
|
INC += -I$(TOP)/$(MCU_DIR)/drivers
|
2021-08-01 10:20:39 +01:00
|
|
|
INC += -I$(TOP)/lib/cmsis/inc
|
|
|
|
INC += -I$(TOP)/lib/oofatfs
|
2020-01-20 11:25:51 +00:00
|
|
|
INC += -I$(TOP)/lib/tinyusb/hw
|
|
|
|
INC += -I$(TOP)/lib/tinyusb/hw/bsp/teensy_40
|
2021-08-01 10:20:39 +01:00
|
|
|
INC += -I$(TOP)/lib/tinyusb/src
|
2022-06-19 22:00:38 +01:00
|
|
|
INC += -I.
|
|
|
|
INC += -Ihal
|
2020-01-20 11:25:51 +00:00
|
|
|
|
2021-07-03 17:39:17 +01:00
|
|
|
# All settings for Ethernet support are controller by the value of MICROPY_PY_LWIP
|
2022-06-22 20:44:04 +01:00
|
|
|
ifeq ($(MICROPY_PY_LWIP),1)
|
2021-07-03 17:39:17 +01:00
|
|
|
INC += -Ilwip_inc
|
|
|
|
INC += -Ihal/phy
|
|
|
|
endif
|
|
|
|
|
2022-06-19 22:00:38 +01:00
|
|
|
# =============================================================================
|
|
|
|
# Sources
|
|
|
|
# =============================================================================
|
|
|
|
|
2020-01-20 11:25:51 +00:00
|
|
|
# TinyUSB Stack source
|
|
|
|
SRC_TINYUSB_C += \
|
|
|
|
lib/tinyusb/src/class/cdc/cdc_device.c \
|
|
|
|
lib/tinyusb/src/class/dfu/dfu_rt_device.c \
|
|
|
|
lib/tinyusb/src/class/hid/hid_device.c \
|
|
|
|
lib/tinyusb/src/class/midi/midi_device.c \
|
2021-08-01 10:20:39 +01:00
|
|
|
lib/tinyusb/src/class/msc/msc_device.c \
|
2020-01-20 11:25:51 +00:00
|
|
|
lib/tinyusb/src/class/usbtmc/usbtmc_device.c \
|
|
|
|
lib/tinyusb/src/class/vendor/vendor_device.c \
|
2021-08-01 10:20:39 +01:00
|
|
|
lib/tinyusb/src/common/tusb_fifo.c \
|
|
|
|
lib/tinyusb/src/device/usbd.c \
|
|
|
|
lib/tinyusb/src/device/usbd_control.c \
|
2022-07-18 14:38:04 +01:00
|
|
|
lib/tinyusb/src/portable/chipidea/ci_hs/dcd_ci_hs.c \
|
2021-08-01 10:20:39 +01:00
|
|
|
lib/tinyusb/src/tusb.c
|
2020-01-20 11:25:51 +00:00
|
|
|
|
2022-06-19 22:00:38 +01:00
|
|
|
# All settings for Ethernet support are controller by the value of MICROPY_PY_LWIP
|
2022-06-22 20:44:04 +01:00
|
|
|
ifeq ($(MICROPY_PY_LWIP),1)
|
2022-06-19 22:00:38 +01:00
|
|
|
SRC_ETH_C += \
|
|
|
|
$(MCU_DIR)/drivers/fsl_enet.c \
|
|
|
|
hal/phy/device/phydp83825/fsl_phydp83825.c \
|
|
|
|
hal/phy/device/phydp83848/fsl_phydp83848.c \
|
|
|
|
hal/phy/device/phyksz8081/fsl_phyksz8081.c \
|
|
|
|
hal/phy/device/phylan8720/fsl_phylan8720.c \
|
2021-10-20 20:24:20 +01:00
|
|
|
hal/phy/device/phyrtl8211f/fsl_phyrtl8211f.c \
|
2022-07-18 13:55:22 +01:00
|
|
|
hal/phy/mdio/enet/fsl_enet_mdio.c
|
2022-06-19 22:00:38 +01:00
|
|
|
endif
|
|
|
|
|
|
|
|
# NXP SDK sources
|
2021-04-24 20:34:07 +01:00
|
|
|
SRC_HAL_IMX_C += \
|
2020-01-20 11:25:51 +00:00
|
|
|
$(MCU_DIR)/drivers/fsl_clock.c \
|
2021-08-01 10:20:39 +01:00
|
|
|
$(MCU_DIR)/drivers/fsl_common.c \
|
2021-06-09 09:47:18 +01:00
|
|
|
$(MCU_DIR)/drivers/fsl_dmamux.c \
|
|
|
|
$(MCU_DIR)/drivers/fsl_edma.c \
|
2021-08-01 10:20:39 +01:00
|
|
|
$(MCU_DIR)/drivers/fsl_flexram.c \
|
|
|
|
$(MCU_DIR)/drivers/fsl_flexspi.c \
|
2020-01-20 11:25:51 +00:00
|
|
|
$(MCU_DIR)/drivers/fsl_gpio.c \
|
2021-05-16 04:27:54 +01:00
|
|
|
$(MCU_DIR)/drivers/fsl_gpt.c \
|
2021-06-19 21:09:40 +01:00
|
|
|
$(MCU_DIR)/drivers/fsl_lpi2c.c \
|
2021-06-09 09:47:18 +01:00
|
|
|
$(MCU_DIR)/drivers/fsl_lpspi.c \
|
|
|
|
$(MCU_DIR)/drivers/fsl_lpspi_edma.c \
|
2020-01-20 11:25:51 +00:00
|
|
|
$(MCU_DIR)/drivers/fsl_lpuart.c \
|
2021-05-18 16:27:00 +01:00
|
|
|
$(MCU_DIR)/drivers/fsl_pit.c \
|
mimxrt: Support PWM using the FLEXPWM and QTMR modules.
Frequency range 15Hz/18Hz to > 1 MHz, with decreasing resolution of the
duty cycle. The basic API is supported as documentated, except that
keyword parameters are accepted for both the instatiaton and the
PWM.init() call.
Extensions: support PWM for channel pairs. Channel pairs are declared by
supplying 2-element tuples for the pins. The two channels of a pair must
be the A/B channel of a FLEXPWM module. These form than a complementary
pair.
Additional supported keyword arguments:
- center=value Defines the center position of a pulse within the pulse
cycle. The align keyword is actually shortcut for center.
- sync=True|False: If set to True, the channels will be synchronized to a
submodule 0 channel, which has already to be enabled.
- align=PWM.MIDDLE | PMW.BEGIN | PWM.END. It defines, whether synchronized
channels are Center-Aligned or Edge-aligned. The channels must be either
complementary a channel pair or a group of synchronized channels. It may
as well be applied to a single channel, but withiout any benefit.
- invert= 0..3. Controls ouput inversion of the pins. Bit 0 controls the
first pin, bit 1 the second.
- deadtime=time_ns time of complementary channels for delaying the rising
slope.
- xor=0|1|2 xor causes the output of channel A and B to be xored. If
applied to a X channel, it shows the value oif A ^ B. If applied to an A
or B channel, both channel show the xored signal for xor=1. For xor=2,
the xored signal is split between channels A and B. See also the
Reference Manual, chapter about double pulses. The behavior of xor=2 can
also be achieved using the center method for locating a pulse within a
clock period.
The output is enabled for board pins only.
CPU pins may still be used for FLEXPWM, e.g. as sync source, but the signal
will not be routed to the output. That applies only to FLEXPWM pins. The
use of QTMR pins which are not board pins will be rejected.
As part of this commit, the _WFE() statement is removed from
ticks_delay_us64() to prevent PWM glitching during calls to sleep().
2021-07-26 11:48:25 +01:00
|
|
|
$(MCU_DIR)/drivers/fsl_pwm.c \
|
2021-11-29 17:50:34 +00:00
|
|
|
$(MCU_DIR)/drivers/fsl_sai.c \
|
mimxrt/machine_rtc: Add the RTC class to the machine module.
Initial version, using the LP RTC clock. It provides setting the date and
time with rtc.init() or rtc.datetime(), and reading the date and time with
rtc.datetime() or rtc.now(). The method weekday() reports the weekday of
the current date. It starts with 0 for Monday.
The tuple order for datetime() and now() matches the CPython sequence:
(year, month, day, hour, minute, second, microsecond, TZ). TZ is ignored
and reported as None. Microsecond is provided at a best effort.
If a battery is not supplied, the default boot date/time is 1970/1/1 0:0:0.
With a battery, the clock continues to run even when the board is not
powered. The clock is quite precise. If not, using rtc.calibration() may
help.
2021-05-20 15:16:25 +01:00
|
|
|
$(MCU_DIR)/drivers/fsl_snvs_lp.c \
|
2021-09-12 15:44:24 +01:00
|
|
|
$(MCU_DIR)/drivers/fsl_wdog.c \
|
2021-10-20 20:24:20 +01:00
|
|
|
$(MCU_DIR)/system_$(MCU_SERIES)$(MCU_CORE).c \
|
2023-05-29 10:38:49 +01:00
|
|
|
|
|
|
|
# Use a specific boot header for 1062 so the Teensy loader doesn't erase the filesystem.
|
|
|
|
ifeq ($(MCU_SERIES), MIMXRT1062)
|
|
|
|
SRC_HAL_IMX_C += hal/fsl_flexspi_nor_boot.c
|
|
|
|
else
|
|
|
|
SRC_HAL_IMX_C += $(MCU_DIR)/xip/fsl_flexspi_nor_boot.c
|
|
|
|
endif
|
2021-08-01 10:20:39 +01:00
|
|
|
|
2022-06-22 20:44:04 +01:00
|
|
|
ifeq ($(MICROPY_HW_SDRAM_AVAIL),1)
|
2021-08-20 20:41:58 +01:00
|
|
|
SRC_HAL_IMX_C += $(MCU_DIR)/drivers/fsl_semc.c
|
|
|
|
endif
|
|
|
|
|
2023-09-05 13:14:00 +01:00
|
|
|
ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES), MIMXRT1021 MIMXRT1052 MIMXRT1062 MIMXRT1064 MIMXRT1176))
|
2021-08-01 10:20:39 +01:00
|
|
|
SRC_HAL_IMX_C += $(MCU_DIR)/drivers/fsl_usdhc.c
|
|
|
|
endif
|
2020-01-20 11:25:51 +00:00
|
|
|
|
2021-10-20 20:24:20 +01:00
|
|
|
ifeq ($(MCU_SERIES),$(filter $(MCU_SERIES), MIMXRT1015 MIMXRT1021 MIMXRT1052 MIMXRT1062 MIMXRT1064 MIMXRT1176))
|
mimxrt: Support PWM using the FLEXPWM and QTMR modules.
Frequency range 15Hz/18Hz to > 1 MHz, with decreasing resolution of the
duty cycle. The basic API is supported as documentated, except that
keyword parameters are accepted for both the instatiaton and the
PWM.init() call.
Extensions: support PWM for channel pairs. Channel pairs are declared by
supplying 2-element tuples for the pins. The two channels of a pair must
be the A/B channel of a FLEXPWM module. These form than a complementary
pair.
Additional supported keyword arguments:
- center=value Defines the center position of a pulse within the pulse
cycle. The align keyword is actually shortcut for center.
- sync=True|False: If set to True, the channels will be synchronized to a
submodule 0 channel, which has already to be enabled.
- align=PWM.MIDDLE | PMW.BEGIN | PWM.END. It defines, whether synchronized
channels are Center-Aligned or Edge-aligned. The channels must be either
complementary a channel pair or a group of synchronized channels. It may
as well be applied to a single channel, but withiout any benefit.
- invert= 0..3. Controls ouput inversion of the pins. Bit 0 controls the
first pin, bit 1 the second.
- deadtime=time_ns time of complementary channels for delaying the rising
slope.
- xor=0|1|2 xor causes the output of channel A and B to be xored. If
applied to a X channel, it shows the value oif A ^ B. If applied to an A
or B channel, both channel show the xored signal for xor=1. For xor=2,
the xored signal is split between channels A and B. See also the
Reference Manual, chapter about double pulses. The behavior of xor=2 can
also be achieved using the center method for locating a pulse within a
clock period.
The output is enabled for board pins only.
CPU pins may still be used for FLEXPWM, e.g. as sync source, but the signal
will not be routed to the output. That applies only to FLEXPWM pins. The
use of QTMR pins which are not board pins will be rejected.
As part of this commit, the _WFE() statement is removed from
ticks_delay_us64() to prevent PWM glitching during calls to sleep().
2021-07-26 11:48:25 +01:00
|
|
|
SRC_HAL_IMX_C += \
|
2023-04-12 15:58:56 +01:00
|
|
|
$(MCU_DIR)/drivers/fsl_qtmr.c \
|
|
|
|
$(MCU_DIR)/drivers/fsl_romapi.c
|
mimxrt: Support PWM using the FLEXPWM and QTMR modules.
Frequency range 15Hz/18Hz to > 1 MHz, with decreasing resolution of the
duty cycle. The basic API is supported as documentated, except that
keyword parameters are accepted for both the instatiaton and the
PWM.init() call.
Extensions: support PWM for channel pairs. Channel pairs are declared by
supplying 2-element tuples for the pins. The two channels of a pair must
be the A/B channel of a FLEXPWM module. These form than a complementary
pair.
Additional supported keyword arguments:
- center=value Defines the center position of a pulse within the pulse
cycle. The align keyword is actually shortcut for center.
- sync=True|False: If set to True, the channels will be synchronized to a
submodule 0 channel, which has already to be enabled.
- align=PWM.MIDDLE | PMW.BEGIN | PWM.END. It defines, whether synchronized
channels are Center-Aligned or Edge-aligned. The channels must be either
complementary a channel pair or a group of synchronized channels. It may
as well be applied to a single channel, but withiout any benefit.
- invert= 0..3. Controls ouput inversion of the pins. Bit 0 controls the
first pin, bit 1 the second.
- deadtime=time_ns time of complementary channels for delaying the rising
slope.
- xor=0|1|2 xor causes the output of channel A and B to be xored. If
applied to a X channel, it shows the value oif A ^ B. If applied to an A
or B channel, both channel show the xored signal for xor=1. For xor=2,
the xored signal is split between channels A and B. See also the
Reference Manual, chapter about double pulses. The behavior of xor=2 can
also be achieved using the center method for locating a pulse within a
clock period.
The output is enabled for board pins only.
CPU pins may still be used for FLEXPWM, e.g. as sync source, but the signal
will not be routed to the output. That applies only to FLEXPWM pins. The
use of QTMR pins which are not board pins will be rejected.
As part of this commit, the _WFE() statement is removed from
ticks_delay_us64() to prevent PWM glitching during calls to sleep().
2021-07-26 11:48:25 +01:00
|
|
|
endif
|
|
|
|
|
2021-10-20 20:24:20 +01:00
|
|
|
ifeq ($(MCU_SERIES), MIMXRT1176)
|
|
|
|
INC += -I$(TOP)/$(MCU_DIR)/drivers/cm7
|
|
|
|
|
|
|
|
SRC_HAL_IMX_C += \
|
|
|
|
$(MCU_DIR)/drivers/cm7/fsl_cache.c \
|
|
|
|
$(MCU_DIR)/drivers/fsl_dcdc.c \
|
|
|
|
$(MCU_DIR)/drivers/fsl_pmu.c \
|
|
|
|
$(MCU_DIR)/drivers/fsl_common_arm.c \
|
|
|
|
$(MCU_DIR)/drivers/fsl_anatop_ai.c \
|
|
|
|
$(MCU_DIR)/drivers/fsl_caam.c \
|
|
|
|
$(MCU_DIR)/drivers/fsl_lpadc.c
|
|
|
|
else
|
|
|
|
SRC_HAL_IMX_C += \
|
|
|
|
$(MCU_DIR)/drivers/fsl_adc.c \
|
|
|
|
$(MCU_DIR)/drivers/fsl_cache.c \
|
|
|
|
$(MCU_DIR)/drivers/fsl_trng.c
|
|
|
|
endif
|
|
|
|
|
2022-06-19 22:00:38 +01:00
|
|
|
# C source files
|
2021-07-20 07:18:18 +01:00
|
|
|
SRC_C += \
|
2020-01-20 11:25:51 +00:00
|
|
|
board_init.c \
|
2022-01-01 13:00:37 +00:00
|
|
|
boards/$(MCU_SERIES)_clock_config.c \
|
2021-11-29 17:50:34 +00:00
|
|
|
dma_manager.c \
|
2021-08-01 10:20:39 +01:00
|
|
|
drivers/bus/softspi.c \
|
2021-06-19 10:00:55 +01:00
|
|
|
drivers/dht/dht.c \
|
2021-07-03 17:39:17 +01:00
|
|
|
eth.c \
|
2021-08-01 10:20:39 +01:00
|
|
|
fatfs_port.c \
|
2022-07-18 19:51:43 +01:00
|
|
|
flash.c \
|
mimxrt: Support PWM using the FLEXPWM and QTMR modules.
Frequency range 15Hz/18Hz to > 1 MHz, with decreasing resolution of the
duty cycle. The basic API is supported as documentated, except that
keyword parameters are accepted for both the instatiaton and the
PWM.init() call.
Extensions: support PWM for channel pairs. Channel pairs are declared by
supplying 2-element tuples for the pins. The two channels of a pair must
be the A/B channel of a FLEXPWM module. These form than a complementary
pair.
Additional supported keyword arguments:
- center=value Defines the center position of a pulse within the pulse
cycle. The align keyword is actually shortcut for center.
- sync=True|False: If set to True, the channels will be synchronized to a
submodule 0 channel, which has already to be enabled.
- align=PWM.MIDDLE | PMW.BEGIN | PWM.END. It defines, whether synchronized
channels are Center-Aligned or Edge-aligned. The channels must be either
complementary a channel pair or a group of synchronized channels. It may
as well be applied to a single channel, but withiout any benefit.
- invert= 0..3. Controls ouput inversion of the pins. Bit 0 controls the
first pin, bit 1 the second.
- deadtime=time_ns time of complementary channels for delaying the rising
slope.
- xor=0|1|2 xor causes the output of channel A and B to be xored. If
applied to a X channel, it shows the value oif A ^ B. If applied to an A
or B channel, both channel show the xored signal for xor=1. For xor=2,
the xored signal is split between channels A and B. See also the
Reference Manual, chapter about double pulses. The behavior of xor=2 can
also be achieved using the center method for locating a pulse within a
clock period.
The output is enabled for board pins only.
CPU pins may still be used for FLEXPWM, e.g. as sync source, but the signal
will not be routed to the output. That applies only to FLEXPWM pins. The
use of QTMR pins which are not board pins will be rejected.
As part of this commit, the _WFE() statement is removed from
ticks_delay_us64() to prevent PWM glitching during calls to sleep().
2021-07-26 11:48:25 +01:00
|
|
|
hal/pwm_backport.c \
|
2023-05-31 07:37:23 +01:00
|
|
|
help.c \
|
2021-08-01 10:20:39 +01:00
|
|
|
led.c \
|
2021-04-24 20:34:07 +01:00
|
|
|
machine_adc.c \
|
2021-08-19 21:00:38 +01:00
|
|
|
machine_bitstream.c \
|
2021-06-19 21:09:40 +01:00
|
|
|
machine_i2c.c \
|
2021-11-29 17:50:34 +00:00
|
|
|
machine_i2s.c \
|
2020-04-12 21:00:06 +01:00
|
|
|
machine_led.c \
|
2020-08-21 15:03:21 +01:00
|
|
|
machine_pin.c \
|
mimxrt/machine_rtc: Add the RTC class to the machine module.
Initial version, using the LP RTC clock. It provides setting the date and
time with rtc.init() or rtc.datetime(), and reading the date and time with
rtc.datetime() or rtc.now(). The method weekday() reports the weekday of
the current date. It starts with 0 for Monday.
The tuple order for datetime() and now() matches the CPython sequence:
(year, month, day, hour, minute, second, microsecond, TZ). TZ is ignored
and reported as None. Microsecond is provided at a best effort.
If a battery is not supplied, the default boot date/time is 1970/1/1 0:0:0.
With a battery, the clock continues to run even when the board is not
powered. The clock is quite precise. If not, using rtc.calibration() may
help.
2021-05-20 15:16:25 +01:00
|
|
|
machine_rtc.c \
|
2021-08-01 10:20:39 +01:00
|
|
|
machine_sdcard.c \
|
2021-06-09 09:47:18 +01:00
|
|
|
machine_spi.c \
|
2021-05-30 17:18:33 +01:00
|
|
|
machine_uart.c \
|
2021-09-12 15:44:24 +01:00
|
|
|
machine_wdt.c \
|
2021-08-01 10:20:39 +01:00
|
|
|
main.c \
|
2021-07-03 17:39:17 +01:00
|
|
|
mbedtls/mbedtls_port.c \
|
2021-05-07 14:21:09 +01:00
|
|
|
mimxrt_flash.c \
|
2021-08-20 20:41:58 +01:00
|
|
|
mimxrt_sdram.c \
|
2020-01-20 11:25:51 +00:00
|
|
|
modmachine.c \
|
2021-05-07 14:21:09 +01:00
|
|
|
modmimxrt.c \
|
2020-01-20 11:25:51 +00:00
|
|
|
mphalport.c \
|
2021-07-03 17:39:17 +01:00
|
|
|
mpnetworkport.c \
|
|
|
|
network_lan.c \
|
|
|
|
pendsv.c \
|
2021-08-01 10:20:39 +01:00
|
|
|
pin.c \
|
|
|
|
sdcard.c \
|
2023-05-02 11:44:46 +01:00
|
|
|
sdio.c \
|
2022-10-08 14:05:11 +01:00
|
|
|
systick.c \
|
|
|
|
ticks.c \
|
|
|
|
tusb_port.c \
|
|
|
|
|
|
|
|
SHARED_SRC_C += \
|
2021-07-09 05:19:15 +01:00
|
|
|
shared/libc/printf.c \
|
|
|
|
shared/libc/string0.c \
|
2022-06-19 22:00:38 +01:00
|
|
|
shared/netutils/dhcpserver.c \
|
2021-07-03 17:39:17 +01:00
|
|
|
shared/netutils/netutils.c \
|
|
|
|
shared/netutils/trace.c \
|
2021-07-09 05:19:15 +01:00
|
|
|
shared/readline/readline.c \
|
|
|
|
shared/runtime/gchelper_native.c \
|
2022-03-27 07:50:34 +01:00
|
|
|
shared/runtime/interrupt_char.c \
|
2021-07-09 05:19:15 +01:00
|
|
|
shared/runtime/mpirq.c \
|
|
|
|
shared/runtime/pyexec.c \
|
2022-10-15 10:40:22 +01:00
|
|
|
shared/runtime/softtimer.c \
|
2021-07-09 05:19:15 +01:00
|
|
|
shared/runtime/stdout_helpers.c \
|
|
|
|
shared/runtime/sys_stdio_mphal.c \
|
|
|
|
shared/timeutils/timeutils.c \
|
2022-06-22 20:26:54 +01:00
|
|
|
|
2023-02-28 21:11:45 +00:00
|
|
|
# Set flash driver name, base address and internal flash flag, based on the flash type.
|
|
|
|
ifeq ($(MICROPY_HW_FLASH_TYPE),$(filter $(MICROPY_HW_FLASH_TYPE),qspi_nor_flash))
|
|
|
|
MICROPY_HW_FLASH_BASE = 0x60000000
|
|
|
|
FLEXSPI_FLASH_TYPE = $(MICROPY_HW_FLASH_TYPE)
|
|
|
|
else ifeq ($(MICROPY_HW_FLASH_TYPE),$(filter $(MICROPY_HW_FLASH_TYPE),qspi_hyper_flash))
|
|
|
|
MICROPY_HW_FLASH_BASE = 0x60000000
|
|
|
|
FLEXSPI_FLASH_TYPE = $(MICROPY_HW_FLASH_TYPE)
|
|
|
|
else ifeq ($(MICROPY_HW_FLASH_TYPE),$(filter $(MICROPY_HW_FLASH_TYPE),internal))
|
|
|
|
# The internal flash is an SPI NOR Flash.
|
|
|
|
MICROPY_HW_FLASH_BASE = 0x70000000
|
|
|
|
FLEXSPI_FLASH_TYPE = qspi_nor_flash
|
|
|
|
CFLAGS += -DMICROPY_HW_FLASH_INTERNAL
|
2022-01-25 20:13:37 +00:00
|
|
|
else
|
2022-06-22 20:26:54 +01:00
|
|
|
$(error Error: Unknown board flash type $(MICROPY_HW_FLASH_TYPE))
|
2021-08-20 20:41:58 +01:00
|
|
|
endif
|
|
|
|
|
2023-02-28 21:11:45 +00:00
|
|
|
# Add sources for respective board flash type
|
|
|
|
# Add hal/flexspi_nor_flash.c or hal/flashspi_hyper_flash.c respectively
|
|
|
|
SRC_HAL_C += hal/flexspi_$(subst qspi_,,$(FLEXSPI_FLASH_TYPE)).c
|
|
|
|
#
|
|
|
|
# Add custom (board specific) or default configuration
|
|
|
|
ifeq ($(MICROPY_HW_BOARD_FLASH_FILES),1)
|
|
|
|
SRC_HAL_C += $(BOARD_DIR)/$(FLEXSPI_FLASH_TYPE)_config.c
|
|
|
|
else
|
|
|
|
SRC_HAL_C += hal/$(FLEXSPI_FLASH_TYPE)_config.c
|
|
|
|
endif
|
|
|
|
|
2023-05-09 16:06:57 +01:00
|
|
|
ifeq ($(MICROPY_PY_BLUETOOTH),1)
|
|
|
|
SRC_C += mpbthciport.c
|
|
|
|
endif # MICROPY_PY_BLUETOOTH
|
|
|
|
|
|
|
|
ifeq ($(MICROPY_BLUETOOTH_NIMBLE),1)
|
|
|
|
SRC_C += mpnimbleport.c
|
|
|
|
endif
|
|
|
|
|
2022-06-19 22:00:38 +01:00
|
|
|
# Math library source files
|
2021-05-26 10:29:34 +01:00
|
|
|
ifeq ($(MICROPY_FLOAT_IMPL),double)
|
2022-06-22 20:41:42 +01:00
|
|
|
LIBM_SRC_C += $(addprefix lib/libm_dbl/,\
|
|
|
|
__cos.c __expo2.c __fpclassify.c __rem_pio2.c __rem_pio2_large.c __signbit.c __sin.c __tan.c acos.c acosh.c \
|
|
|
|
asin.c asinh.c atan.c atan2.c atanh.c ceil.c copysign.c cos.c cosh.c erf.c exp.c expm1.c floor.c fmod.c \
|
|
|
|
frexp.c ldexp.c lgamma.c log.c log10.c log1p.c modf.c nearbyint.c pow.c rint.c round.c scalbn.c sin.c \
|
|
|
|
sinh.c tan.c tanh.c tgamma.c trunc.c)
|
|
|
|
#
|
|
|
|
ifeq ($(SUPPORTS_HARDWARE_FP_DOUBLE),1)
|
|
|
|
LIBM_SRC_C += lib/libm_dbl/thumb_vfp_sqrt.c
|
|
|
|
else
|
|
|
|
LIBM_SRC_C += lib/libm_dbl/sqrt.c
|
|
|
|
endif
|
2021-05-26 10:29:34 +01:00
|
|
|
else
|
2022-06-22 20:41:42 +01:00
|
|
|
LIBM_SRC_C += $(addprefix lib/libm/,\
|
|
|
|
acoshf.c asinfacosf.c asinhf.c atan2f.c atanf.c atanhf.c ef_rem_pio2.c erf_lgamma.c fmodf.c kf_cos.c \
|
|
|
|
kf_rem_pio2.c kf_sin.c kf_tan.c log1pf.c math.c nearbyintf.c roundf.c sf_cos.c sf_erf.c sf_frexp.c sf_ldexp.c \
|
|
|
|
sf_modf.c sf_sin.c sf_tan.c wf_lgamma.c wf_tgamma.c)
|
|
|
|
ifeq ($(SUPPORTS_HARDWARE_FP_SINGLE),1)
|
|
|
|
LIBM_SRC_C += lib/libm/thumb_vfp_sqrtf.c
|
|
|
|
else
|
|
|
|
LIBM_SRC_C += lib/libm/ef_sqrt.c
|
|
|
|
endif
|
2021-05-26 10:29:34 +01:00
|
|
|
endif
|
|
|
|
|
2022-06-19 22:00:38 +01:00
|
|
|
# Reset variables
|
|
|
|
SUPPORTS_HARDWARE_FP_SINGLE = 0
|
|
|
|
SUPPORTS_HARDWARE_FP_DOUBLE = 0
|
2021-05-26 10:29:34 +01:00
|
|
|
|
2022-06-19 22:00:38 +01:00
|
|
|
# Assembly source files
|
2021-08-20 20:41:58 +01:00
|
|
|
SRC_SS = \
|
2021-10-20 20:24:20 +01:00
|
|
|
$(MCU_DIR)/gcc/startup_$(MCU_SERIES)$(MCU_CORE).S \
|
2021-08-20 20:41:58 +01:00
|
|
|
hal/resethandler_MIMXRT10xx.S
|
2020-01-20 11:25:51 +00:00
|
|
|
|
2023-01-23 20:53:39 +00:00
|
|
|
SRC_S += shared/runtime/gchelper_thumb2.s \
|
2020-01-20 11:25:51 +00:00
|
|
|
|
2022-06-19 22:00:38 +01:00
|
|
|
# =============================================================================
|
|
|
|
# QSTR Sources
|
|
|
|
# =============================================================================
|
|
|
|
|
2020-01-20 11:25:51 +00:00
|
|
|
# List of sources for qstr extraction
|
2022-10-08 14:05:11 +01:00
|
|
|
SRC_QSTR += $(SRC_C) $(SHARED_SRC_C) $(GEN_PINS_SRC)
|
2022-06-19 22:00:38 +01:00
|
|
|
|
|
|
|
# =============================================================================
|
|
|
|
# Compiler Flags
|
|
|
|
# =============================================================================
|
|
|
|
|
2022-07-28 08:56:27 +01:00
|
|
|
CFLAGS += -g # always include debug info in the ELF
|
2022-06-19 22:00:38 +01:00
|
|
|
ifeq ($(DEBUG),1)
|
2022-07-28 08:56:27 +01:00
|
|
|
CFLAGS += -Og
|
2023-03-04 14:27:57 +00:00
|
|
|
# Disable text compression in debug builds
|
|
|
|
MICROPY_ROM_TEXT_COMPRESSION = 0
|
2022-06-19 22:00:38 +01:00
|
|
|
else
|
|
|
|
CFLAGS += -Os -DNDEBUG
|
|
|
|
endif
|
|
|
|
|
2022-06-22 19:39:23 +01:00
|
|
|
# Set default values for optional variables
|
|
|
|
MICROPY_HW_SDRAM_AVAIL ?= 0
|
|
|
|
MICROPY_HW_SDRAM_SIZE ?= 0
|
|
|
|
|
2022-06-19 22:00:38 +01:00
|
|
|
# Configure default compiler flags
|
|
|
|
CFLAGS += \
|
|
|
|
$(INC) \
|
|
|
|
-D__START=main \
|
|
|
|
-D__STARTUP_CLEAR_BSS \
|
|
|
|
-D__STARTUP_INITIALIZE_RAMFUNCTION \
|
|
|
|
-DBOARD_$(BOARD) \
|
|
|
|
-DBOARD_FLASH_SIZE=$(MICROPY_HW_FLASH_SIZE) \
|
2023-08-21 08:46:23 +01:00
|
|
|
-DCFG_TUSB_MCU=OPT_MCU_MIMXRT1XXX \
|
2022-06-19 22:00:38 +01:00
|
|
|
-DCLOCK_CONFIG_H='<boards/$(MCU_SERIES)_clock_config.h>' \
|
2021-10-20 20:24:20 +01:00
|
|
|
-DCPU_$(MCU_SERIES)$(MCU_CORE) \
|
2022-06-19 22:00:38 +01:00
|
|
|
-DCPU_$(MCU_VARIANT) \
|
2021-10-20 20:24:20 +01:00
|
|
|
-DCPU_HEADER_H='<$(MCU_SERIES)$(MCU_CORE).h>' \
|
2022-06-19 22:00:38 +01:00
|
|
|
-DFSL_SDK_ENABLE_DRIVER_CACHE_CONTROL=1 \
|
|
|
|
-DI2C_RETRY_TIMES=1000000 \
|
|
|
|
-DMICROPY_HW_FLASH_SIZE=$(MICROPY_HW_FLASH_SIZE) \
|
2022-06-22 19:39:23 +01:00
|
|
|
-DMICROPY_HW_SDRAM_AVAIL=$(MICROPY_HW_SDRAM_AVAIL) \
|
|
|
|
-DMICROPY_HW_SDRAM_SIZE=$(MICROPY_HW_SDRAM_SIZE) \
|
2022-06-19 22:00:38 +01:00
|
|
|
-DSPI_RETRY_TIMES=1000000 \
|
|
|
|
-DUART_RETRY_TIMES=1000000 \
|
|
|
|
-DXIP_BOOT_HEADER_ENABLE=1 \
|
|
|
|
-DXIP_EXTERNAL_FLASH=1 \
|
|
|
|
-fdata-sections \
|
|
|
|
-ffunction-sections \
|
|
|
|
-mcpu=cortex-m7 \
|
|
|
|
-mthumb \
|
|
|
|
-mtune=cortex-m7 \
|
|
|
|
-nostdlib \
|
|
|
|
-std=c99 \
|
|
|
|
-Wall \
|
|
|
|
-Wdouble-promotion \
|
|
|
|
-Werror \
|
|
|
|
-Wfloat-conversion \
|
|
|
|
-Wno-error=unused-parameter
|
|
|
|
|
2022-06-22 20:26:54 +01:00
|
|
|
# Configure respective board flash type
|
2023-02-28 21:11:45 +00:00
|
|
|
# Add hal/flexspi_nor_flash.h or hal/flexspi_hyper_flash.h respectively
|
|
|
|
CFLAGS += -DBOARD_FLASH_OPS_HEADER_H=\"hal/flexspi_$(subst qspi_,,$(FLEXSPI_FLASH_TYPE)).h\"
|
|
|
|
#
|
|
|
|
# Add custom (board specific) or default configuration
|
|
|
|
ifeq ($(MICROPY_HW_BOARD_FLASH_FILES),1)
|
|
|
|
CFLAGS += -DBOARD_FLASH_CONFIG_HEADER_H=\"$(BOARD)_flexspi_flash_config.h\"
|
2022-06-19 22:00:38 +01:00
|
|
|
else
|
2023-02-28 21:11:45 +00:00
|
|
|
CFLAGS += -DBOARD_FLASH_CONFIG_HEADER_H=\"hal/flexspi_flash_config.h\"
|
2022-06-19 22:00:38 +01:00
|
|
|
endif
|
|
|
|
|
|
|
|
# Configure floating point support
|
2022-06-22 20:41:42 +01:00
|
|
|
ifeq ($(MICROPY_FLOAT_IMPL),single)
|
|
|
|
CFLAGS += \
|
|
|
|
-DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_FLOAT \
|
|
|
|
-fsingle-precision-constant \
|
|
|
|
-mfloat-abi=softfp \
|
|
|
|
-mfpu=fpv5-sp-d16
|
|
|
|
else ifeq ($(MICROPY_FLOAT_IMPL),double)
|
|
|
|
CFLAGS += \
|
|
|
|
-DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_DOUBLE \
|
|
|
|
-mfloat-abi=hard \
|
|
|
|
-mfpu=fpv5-d16
|
|
|
|
else ifeq ($(MICROPY_FLOAT_IMPL),none)
|
|
|
|
CFLAGS += \
|
|
|
|
-DMICROPY_FLOAT_IMPL=MICROPY_FLOAT_IMPL_NONE
|
2022-06-19 22:00:38 +01:00
|
|
|
else
|
2022-06-22 20:41:42 +01:00
|
|
|
$(error Error: Unknown floating point implementation $(MICROPY_FLOAT_IMPL))
|
2022-06-19 22:00:38 +01:00
|
|
|
endif
|
|
|
|
|
2022-06-22 20:41:42 +01:00
|
|
|
|
2022-06-19 22:00:38 +01:00
|
|
|
# All settings for Ethernet support are controller by the value of MICROPY_PY_LWIP
|
2022-06-22 20:44:04 +01:00
|
|
|
ifeq ($(MICROPY_PY_LWIP),1)
|
2022-06-19 22:00:38 +01:00
|
|
|
CFLAGS += \
|
2022-11-09 17:35:40 +00:00
|
|
|
-DFSL_FEATURE_PHYKSZ8081_USE_RMII50M_MODE=1
|
2022-06-19 22:00:38 +01:00
|
|
|
endif
|
|
|
|
|
2023-08-04 01:55:27 +01:00
|
|
|
ifdef MICROPY_HW_FLASH_CLK
|
|
|
|
CFLAGS += -DMICROPY_HW_FLASH_CLK=$(MICROPY_HW_FLASH_CLK)
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endif
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extmod: Make extmod.mk self-contained.
This makes it so that all a port needs to do is set the relevant variables
and "include extmod.mk" and doesn't need to worry about adding anything to
OBJ, CFLAGS, SRC_QSTR, etc.
Make all extmod variables (src, flags, etc) private to extmod.mk.
Also move common/shared, extmod-related fragments (e.g. wiznet, cyw43,
bluetooth) into extmod.mk.
Now that SRC_MOD, CFLAGS_MOD, CXXFLAGS_MOD are unused by both extmod.mk
(and user-C-modules in a previous commit), remove all uses of them from
port makefiles.
Signed-off-by: Jim Mussared <jim.mussared@gmail.com>
2022-10-08 13:59:08 +01:00
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CFLAGS += $(CFLAGS_EXTRA)
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2022-06-19 22:00:38 +01:00
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2022-11-16 03:39:49 +00:00
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MPY_CROSS_FLAGS += -march=armv7m
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2022-06-19 22:00:38 +01:00
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# =============================================================================
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# Linker Flags
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# =============================================================================
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2022-10-08 13:08:53 +01:00
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LDFLAGS += \
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2022-06-19 22:00:38 +01:00
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--cref \
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--gc-sections \
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--print-memory-usage \
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-Map=$@.map
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# LDDEFINES are used for link time adaptation of linker scripts, utilizing
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# the C preprocessor. Therefore keep LDDEFINES separated from LDFLAGS!
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LDDEFINES = \
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2023-02-28 21:11:45 +00:00
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-DMICROPY_HW_FLASH_BASE=$(MICROPY_HW_FLASH_BASE) \
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2022-06-19 22:00:38 +01:00
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-DMICROPY_HW_FLASH_SIZE=$(MICROPY_HW_FLASH_SIZE)
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ifdef MICROPY_HW_FLASH_RESERVED
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LDDEFINES += -DMICROPY_HW_FLASH_RESERVED=$(MICROPY_HW_FLASH_RESERVED)
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endif
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ifdef MICROPY_HW_SDRAM_AVAIL
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LDDEFINES += \
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-DMICROPY_HW_SDRAM_AVAIL=$(MICROPY_HW_SDRAM_AVAIL) \
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-DMICROPY_HW_SDRAM_SIZE=$(MICROPY_HW_SDRAM_SIZE)
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endif
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# =============================================================================
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# Library and Object files
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# =============================================================================
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LIBS = $(shell $(CC) $(CFLAGS) -print-libgcc-file-name)
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LIBM_O = $(addprefix $(BUILD)/, $(LIBM_SRC_C:.c=.o))
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# Too many warnings in libm_dbl, disable for now.
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ifeq ($(MICROPY_FLOAT_IMPL),double)
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$(LIBM_O): CFLAGS := $(filter-out -Wdouble-promotion -Wfloat-conversion, $(CFLAGS))
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endif
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2020-01-20 11:25:51 +00:00
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OBJ += $(PY_O)
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2021-05-26 10:29:34 +01:00
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OBJ += $(LIBM_O)
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2020-01-20 11:25:51 +00:00
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OBJ += $(addprefix $(BUILD)/, $(SRC_C:.c=.o))
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2022-10-08 14:05:11 +01:00
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OBJ += $(addprefix $(BUILD)/, $(SHARED_SRC_C:.c=.o))
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2023-05-09 16:06:57 +01:00
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OBJ += $(addprefix $(BUILD)/, $(DRIVERS_SRC_C:.c=.o))
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2020-01-20 11:25:51 +00:00
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OBJ += $(addprefix $(BUILD)/, $(SRC_S:.s=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_SS:.S=.o))
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2022-10-08 14:05:11 +01:00
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OBJ += $(addprefix $(BUILD)/, $(SRC_TINYUSB_C:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_HAL_C:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_HAL_IMX_C:.c=.o))
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OBJ += $(addprefix $(BUILD)/, $(SRC_ETH_C:.c=.o))
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2022-10-08 13:23:52 +01:00
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OBJ += $(GEN_PINS_SRC:.c=.o)
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2020-01-20 11:25:51 +00:00
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# Workaround for bug in older gcc, warning on "static usbd_device_t _usbd_dev = { 0 };"
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$(BUILD)/lib/tinyusb/src/device/usbd.o: CFLAGS += -Wno-missing-braces
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2022-06-19 22:00:38 +01:00
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# =============================================================================
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# Build targets
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# =============================================================================
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2021-06-23 20:18:45 +01:00
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all: $(BUILD)/firmware.hex $(BUILD)/firmware.bin
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2020-01-20 11:25:51 +00:00
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2022-06-19 22:00:38 +01:00
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# Process linker scripts with C preprocessor to exchange LDDEFINES and
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# aggregate output of preprocessor in a single linker script `link.ld`
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2020-01-20 11:25:51 +00:00
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$(BUILD)/firmware.elf: $(OBJ)
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2021-08-20 20:41:58 +01:00
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$(ECHO) "PREPROCESS LINK $@"
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$(Q)$(CC) -E -x c $(LDDEFINES) $(LD_FILES) | grep -v '^#' > $(BUILD)/link.ld
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2020-01-20 11:25:51 +00:00
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$(ECHO) "LINK $@"
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2021-08-20 20:41:58 +01:00
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$(Q)$(LD) -T$(BUILD)/link.ld $(LDFLAGS) -o $@ $^ $(LIBS)
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2020-01-20 11:25:51 +00:00
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$(Q)$(SIZE) $@
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$(BUILD)/firmware.bin: $(BUILD)/firmware.elf
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$(Q)$(OBJCOPY) -O binary $^ $@
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$(BUILD)/firmware.hex: $(BUILD)/firmware.elf
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$(Q)$(OBJCOPY) -O ihex -R .eeprom $< $@
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2021-08-20 20:41:58 +01:00
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# Making OBJ use an order-only dependency on the generated pins.h file
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2020-08-21 15:03:21 +01:00
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# has the side effect of making the pins.h file before we actually compile
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# any of the objects. The normal dependency generation will deal with the
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# case when pins.h is modified. But when it doesn't exist, we don't know
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# which source files might need it.
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2021-08-20 20:41:58 +01:00
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$(OBJ): | $(GEN_PINS_HDR) $(GEN_FLEXRAM_CONFIG_SRC)
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2020-08-21 15:03:21 +01:00
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# With conditional pins, we may need to regenerate qstrdefs.h when config
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# options change.
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$(HEADER_BUILD)/qstrdefs.generated.h: $(BOARD_DIR)/mpconfigboard.h
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2021-08-20 20:41:58 +01:00
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$(GEN_FLEXRAM_CONFIG_SRC):
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$(ECHO) "Create $@"
|
2021-10-20 20:24:20 +01:00
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$(Q)$(PYTHON) $(MAKE_FLEXRAM_LD) -d $(TOP)/$(MCU_DIR)/$(MCU_SERIES)$(MCU_CORE).h \
|
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-f $(TOP)/$(MCU_DIR)/$(MCU_SERIES)$(MCU_CORE)_features.h -l boards/$(MCU_SERIES).ld -c $(MCU_SERIES) > $(GEN_FLEXRAM_CONFIG_SRC)
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2021-08-20 20:41:58 +01:00
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2020-08-21 15:03:21 +01:00
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# Use a pattern rule here so that make will only call make-pins.py once to make
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|
# both pins_gen.c and pins.h
|
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|
|
$(BUILD)/%_gen.c $(HEADER_BUILD)/%.h: $(BOARD_PINS) $(MAKE_PINS) $(AF_FILE) $(PREFIX_FILE) | $(HEADER_BUILD)
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$(ECHO) "Create $@"
|
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|
$(Q)$(PYTHON) $(MAKE_PINS) --board $(BOARD_PINS) --af $(AF_FILE)\
|
2021-08-01 10:20:39 +01:00
|
|
|
--iomux $(abspath $(TOP)/$(MCU_DIR)/drivers/fsl_iomuxc.h) \
|
2020-08-21 15:03:21 +01:00
|
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--prefix $(PREFIX_FILE) --hdr $(GEN_PINS_HDR) > $(GEN_PINS_SRC)
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2022-10-08 13:23:52 +01:00
|
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$(GEN_PINS_SRC:.c=.o): $(GEN_PINS_SRC)
|
2020-08-21 15:03:21 +01:00
|
|
|
$(call compile_c)
|
|
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|
|
2020-01-20 11:25:51 +00:00
|
|
|
include $(TOP)/py/mkrules.mk
|