2021-07-21 12:45:33 +01:00
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/*
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* This file is part of the MicroPython project, http://micropython.org/
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* The MIT License (MIT)
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* Copyright (c) 2021 Damien P. George
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*/
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#include <stdint.h>
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#define MICROPY_HW_BOARD_NAME "LEGO Technic Hub No.6"
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#define MICROPY_HW_MCU_NAME "STM32F413"
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#define MICROPY_HW_HAS_SWITCH (0)
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#define MICROPY_HW_HAS_FLASH (1)
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#define MICROPY_PY_PYB_LEGACY (0)
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#define MICROPY_HW_ENTER_BOOTLOADER_VIA_RESET (0)
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#define MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE (0)
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#define MICROPY_HW_ENABLE_RTC (1)
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#define MICROPY_HW_ENABLE_RNG (1)
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#define MICROPY_HW_ENABLE_DAC (1)
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#define MICROPY_HW_ENABLE_USB (1)
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#define MICROPY_HW_FLASH_FS_LABEL "HUB_NO6"
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2021-07-21 12:45:33 +01:00
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// HSE is 16MHz, CPU freq set to 100MHz, buses at maximum freq
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#define MICROPY_HW_CLK_PLLM (16)
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#define MICROPY_HW_CLK_PLLN (200)
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#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV2)
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#define MICROPY_HW_CLK_PLLQ (4)
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#define MICROPY_HW_CLK_AHB_DIV (RCC_SYSCLK_DIV1)
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#define MICROPY_HW_CLK_APB1_DIV (RCC_HCLK_DIV2)
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#define MICROPY_HW_CLK_APB2_DIV (RCC_HCLK_DIV1)
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// For 2.7 to 3.6 V, 75 to 100 MHz: 3 wait states.
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#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_3
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// UART buses
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// Bluetooth HCI
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#define MICROPY_HW_UART2_CTS (pyb_pin_BT_CTS)
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#define MICROPY_HW_UART2_RTS (pyb_pin_BT_RTS)
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#define MICROPY_HW_UART2_TX (pyb_pin_BT_TX)
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#define MICROPY_HW_UART2_RX (pyb_pin_BT_RX)
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// Port B
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#define MICROPY_HW_UART4_TX (pyb_pin_PORTB_TX)
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#define MICROPY_HW_UART4_RX (pyb_pin_PORTB_RX)
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// Port D
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#define MICROPY_HW_UART5_TX (pyb_pin_PORTD_TX)
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#define MICROPY_HW_UART5_RX (pyb_pin_PORTD_RX)
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// Port A
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#define MICROPY_HW_UART7_TX (pyb_pin_PORTA_TX)
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#define MICROPY_HW_UART7_RX (pyb_pin_PORTA_RX)
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// Port C
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#define MICROPY_HW_UART8_TX (pyb_pin_PORTC_TX)
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#define MICROPY_HW_UART8_RX (pyb_pin_PORTC_RX)
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// Port F
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#define MICROPY_HW_UART9_TX (pyb_pin_PORTF_TX)
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#define MICROPY_HW_UART9_RX (pyb_pin_PORTF_RX)
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// Port E
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#define MICROPY_HW_UART10_TX (pyb_pin_PORTE_TX)
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#define MICROPY_HW_UART10_RX (pyb_pin_PORTE_RX)
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// SPI buses
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#define MICROPY_HW_SPI1_SCK (pyb_pin_TLC_SCLK)
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#define MICROPY_HW_SPI1_MISO (pyb_pin_TLC_SOUT)
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#define MICROPY_HW_SPI1_MOSI (pyb_pin_TLC_SIN)
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#define MICROPY_HW_SPI2_NSS (pyb_pin_FLASH_NSS)
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#define MICROPY_HW_SPI2_SCK (pyb_pin_FLASH_SCK)
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#define MICROPY_HW_SPI2_MISO (pyb_pin_FLASH_MISO)
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#define MICROPY_HW_SPI2_MOSI (pyb_pin_FLASH_MOSI)
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// USB config
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#define MICROPY_HW_USB_VBUS_DETECT_PIN (pyb_pin_USB_VBUS)
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#define MICROPY_HW_USB_FS (1)
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#define MICROPY_HW_USB_MSC (1)
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// Bluetooth config
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#define MICROPY_HW_BLE_UART_ID (PYB_UART_2)
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#define MICROPY_HW_BLE_UART_BAUDRATE (115200)
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#define MICROPY_HW_BLE_UART_BAUDRATE_SECONDARY (921600)
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#define MICROPY_HW_BLE_BTSTACK_CHIPSET_INSTANCE btstack_chipset_cc256x_instance()
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2022-06-02 04:25:25 +01:00
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// External SPI flash starts in 32-bit addressing mode, so make all SPI flash
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// transfers use the explicit 32-bit addressing instructions.
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#define MICROPY_HW_SPI_ADDR_IS_32BIT(addr) (1)
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// SPI flash, for R/W storage
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// The first 1MiB is skipped because it's used by the built-in bootloader
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2021-09-01 15:03:41 +01:00
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// Note: MICROPY_HW_SPIFLASH_OFFSET_BYTES must be a multiple of MP_SPIFLASH_ERASE_BLOCK_SIZE
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#define MICROPY_HW_SPIFLASH_OFFSET_BYTES (1024 * 1024)
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#define MICROPY_HW_SPIFLASH_BLOCKMAP(bl) ((bl) + MICROPY_HW_SPIFLASH_OFFSET_BYTES / FLASH_BLOCK_SIZE)
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#define MICROPY_HW_SPIFLASH_BLOCKMAP_EXT(bl) ((bl) + MICROPY_HW_SPIFLASH_OFFSET_BYTES / MP_SPIFLASH_ERASE_BLOCK_SIZE)
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#define MICROPY_HW_SPIFLASH_ENABLE_CACHE (1)
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#define MICROPY_HW_SPIFLASH_SIZE_BITS (256 * 1024 * 1024 - MICROPY_HW_SPIFLASH_OFFSET_BYTES * 8)
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#define MICROPY_HW_SPIFLASH_CS (MICROPY_HW_SPI2_NSS)
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#define MICROPY_HW_SPIFLASH_SCK (MICROPY_HW_SPI2_SCK)
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#define MICROPY_HW_SPIFLASH_MISO (MICROPY_HW_SPI2_MISO)
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#define MICROPY_HW_SPIFLASH_MOSI (MICROPY_HW_SPI2_MOSI)
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// SPI flash, block device config
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#define MICROPY_HW_BDEV_IOCTL(op, arg) ( \
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(op) == BDEV_IOCTL_NUM_BLOCKS ? (MICROPY_HW_SPIFLASH_SIZE_BITS / 8 / FLASH_BLOCK_SIZE) : \
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(op) == BDEV_IOCTL_INIT ? spi_bdev_ioctl(&spi_bdev, (op), (uint32_t)&spiflash_config) : \
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spi_bdev_ioctl(&spi_bdev, (op), (arg)) \
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)
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// Configuration for stardard block protocol (block size FLASH_BLOCK_SIZE).
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#define MICROPY_HW_BDEV_READBLOCKS(dest, bl, n) \
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spi_bdev_readblocks(&spi_bdev, (dest), MICROPY_HW_SPIFLASH_BLOCKMAP(bl), (n))
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#define MICROPY_HW_BDEV_WRITEBLOCKS(src, bl, n) \
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spi_bdev_writeblocks(&spi_bdev, (src), MICROPY_HW_SPIFLASH_BLOCKMAP(bl), (n))
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// Configuration for extended block protocol (block size MP_SPIFLASH_ERASE_BLOCK_SIZE).
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#define MICROPY_HW_BDEV_BLOCKSIZE_EXT (MP_SPIFLASH_ERASE_BLOCK_SIZE)
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#define MICROPY_HW_BDEV_READBLOCKS_EXT(dest, bl, off, len) \
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(spi_bdev_readblocks_raw(&spi_bdev, (dest), MICROPY_HW_SPIFLASH_BLOCKMAP_EXT(bl), (off), (len)))
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#define MICROPY_HW_BDEV_WRITEBLOCKS_EXT(src, bl, off, len) \
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(spi_bdev_writeblocks_raw(&spi_bdev, (src), MICROPY_HW_SPIFLASH_BLOCKMAP_EXT(bl), (off), (len)))
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#define MICROPY_HW_BDEV_ERASEBLOCKS_EXT(bl, len) \
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(spi_bdev_eraseblocks_raw(&spi_bdev, MICROPY_HW_SPIFLASH_BLOCKMAP_EXT(bl), (len)))
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// Board control config
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#define MICROPY_BOARD_STARTUP board_init
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/******************************************************************************/
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// Bootloader configuration
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2022-06-02 04:29:30 +01:00
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// Configure CPU frequency to 96MHz, to make updates from SPI flash faster
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#define MBOOT_CLK_PLLM (MICROPY_HW_CLK_VALUE / 1000000)
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#define MBOOT_CLK_PLLN (192)
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#define MBOOT_CLK_PLLP (RCC_PLLP_DIV2)
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#define MBOOT_CLK_PLLQ (4)
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#define MBOOT_CLK_AHB_DIV (RCC_SYSCLK_DIV1)
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#define MBOOT_CLK_APB1_DIV (RCC_HCLK_DIV4)
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#define MBOOT_CLK_APB2_DIV (RCC_HCLK_DIV2)
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#define MBOOT_FLASH_LATENCY FLASH_LATENCY_3
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#define MBOOT_FSLOAD (1)
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#define MBOOT_VFS_FAT (1)
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#define MBOOT_LEAVE_BOOTLOADER_VIA_RESET (0)
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#define MBOOT_SPIFLASH_ADDR (0x80000000)
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#define MBOOT_SPIFLASH_BYTE_SIZE (32 * 1024 * 1024)
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#define MBOOT_SPIFLASH_LAYOUT "/0x80000000/8192*4Kg"
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#define MBOOT_SPIFLASH_ERASE_BLOCKS_PER_PAGE (1)
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#define MBOOT_SPIFLASH_SPIFLASH (&board_mboot_spiflash)
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#define MBOOT_SPIFLASH_CONFIG (&board_mboot_spiflash_config)
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#define MBOOT_LED1 0
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#define MBOOT_LED2 1
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#define MBOOT_LED3 2
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#define MBOOT_BOARD_LED_INIT board_mboot_led_init
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#define MBOOT_BOARD_LED_STATE board_mboot_led_state
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2022-06-01 11:59:11 +01:00
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#define MBOOT_BOARD_EARLY_INIT(initial_r0) board_init()
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#define MBOOT_BOARD_CLEANUP board_mboot_cleanup
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#define MBOOT_BOARD_GET_RESET_MODE board_mboot_get_reset_mode
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#define MBOOT_BOARD_STATE_CHANGE board_mboot_state_change
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/******************************************************************************/
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// Function declarations
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2022-06-02 04:25:25 +01:00
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extern const struct _mp_spiflash_config_t spiflash_config;
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extern struct _spi_bdev_t spi_bdev;
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extern const struct _mp_spiflash_config_t board_mboot_spiflash_config;
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extern struct _mp_spiflash_t board_mboot_spiflash;
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void board_init(void);
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void board_mboot_cleanup(int reset_mode);
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void board_mboot_led_init(void);
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void board_mboot_led_state(int led, int state);
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2022-06-01 11:59:11 +01:00
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int board_mboot_get_reset_mode(uint32_t *initial_r0);
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2022-06-02 04:43:46 +01:00
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void board_mboot_state_change(int state, uint32_t arg);
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2021-07-21 12:45:33 +01:00
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void *btstack_chipset_cc256x_instance(void);
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